參數(shù)資料
型號: DSPA56371
廠商: 飛思卡爾半導(dǎo)體(中國)有限公司
元件分類: 數(shù)字信號處理
英文描述: SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
中文描述: SigmaDSP的28-/56-Bit音頻處理器雙ADC和4個DAC
文件頁數(shù): 30/124頁
文件大?。?/td> 1752K
代理商: DSPA56371
Signal/Connection Descriptions
Freescale Semiconductor
DSP56371 Technical Data
13
Table 6. Interrupt and Mode Control
Signal Name
Type
State
During
Reset
Signal Description
MODA/IRQA
Input
Mode Select A/External Interrupt Request A—MODA/IRQA is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODA/IRQA
selects the initial chip operating mode during hardware reset and becomes a
level-sensitive or negative-edge-triggered, maskable interrupt request input
during normal instruction processing. MODA, MODB, MODC and MODD
select one of 16 initial chip operating modes, latched into the OMR when the
RESET signal is deasserted. If the processor is in the stop standby state and
the MODA/IRQA pin is pulled to GND, the processor will exit the stop state.
Internal Pull up resistor.
This input is 5 V tolerant.
MODB/IRQB
Input
Mode Select B/External Interrupt Request B—MODB/IRQB is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODB/IRQB
selects the initial chip operating mode during hardware reset and becomes a
level-sensitive or negative-edge-triggered, maskable interrupt request input
during normal instruction processing. MODA, MODB, MODC and MODD
select one of 16 initial chip operating modes, latched into OMR when the
RESET signal is deasserted.
Internal Pull up resistor.
This input is 5 V tolerant.
MODC/IRQC
Input
Mode Select C/External Interrupt Request C—MODC/IRQC is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODC/IRQC
selects the initial chip operating mode during hardware reset and becomes a
level-sensitive or negative-edge-triggered, maskable interrupt request input
during normal instruction processing. MODA, MODB, MODC and MODD
select one of 16 initial chip operating modes, latched into OMR when the
RESET signal is deasserted.
Internal Pull up resistor.
This input is 5 V tolerant.
MODD/IRQD
Input
Mode Select D/External Interrupt Request D—MODD/IRQD is an active-low
Schmitt-trigger input, internally synchronized to the DSP clock. MODD/IRQD
selects the initial chip operating mode during hardware reset and becomes a
level-sensitive or negative-edge-triggered, maskable interrupt request input
during normal instruction processing. MODA, MODB, MODC and MODD
select one of 16 initial chip operating modes, latched into OMR when the
RESET signal is deasserted.
Internal Pull up resistor.
This input is 5 V tolerant.
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