參數(shù)資料
型號： DSPA56371
廠商： 飛思卡爾半導體(中國)有限公司
元件分類： 數(shù)字信號處理
英文描述： SigmaDSP 28-/56-Bit Audio Processor with Two ADCs and Four DACs
中文描述： SigmaDSP的28-/56-Bit音頻處理器雙ADC和4個DAC
文件頁數(shù)： 32/124頁
文件大?。?/td> 1752K
代理商： DSPA56371
Signal/Connection Descriptions
Freescale Semiconductor
DSP56371 Technical Data
15
MISO
Input or
output
Tri-stated
SPI Master-In-Slave-Out—When the SPI is configured as a master, MISO is
the master data input line. The MISO signal is used in conjunction with the
MOSI signal for transmitting and receiving serial data. This signal is a Schmitt-
trigger input when configured for the SPI Master mode, an output when
configured for the SPI Slave mode, and tri-stated if configured for the SPI Slave
mode when SS is deasserted. An external pull-up resistor is not required for
SPI operation.
SDA
Input or
open-drain
output
I2C Data and Acknowledge—In I2C mode, SDA is a Schmitt-trigger input when
receiving and an open-drain output when transmitting. SDA should be
connected to VDD through a pull-up resistor. SDA carries the data for I
2C
transactions. The data in SDA must be stable during the high period of SCL.
The data in SDA is only allowed to change when SCL is low. When the bus is
free, SDA is high. The SDA line is only allowed to change during the time SCL is
high in the case of start and stop events. A high-to-low transition of the SDA line
while SCL is high is a unique situation, and it is defined as the start event. A
low-to-high transition of SDA while SCL is high is a unique situation defined as
the stop event.
This signal is tri-stated during hardware, software and individual reset. Thus,
there is no need for an external pull-up in this state.
Internal Pull up resistor.
This input is 5 V tolerant.
MOSI
Input or
output
Tri-stated
SPI Master-Out-Slave-In—When the SPI is configured as a master, MOSI is
the master data output line. The MOSI signal is used in conjunction with the
MISO signal for transmitting and receiving serial data. MOSI is the slave data
input line when the SPI is configured as a slave. This signal is a Schmitt-trigger
input when configured for the SPI Slave mode.
HA0
Input
I2C Slave Address 0—This signal uses a Schmitt-trigger input when
configured for the I2C mode. When configured for I2C slave mode, the HA0
signal is used to form the slave device address. HA0 is ignored when
configured for the I2C master mode.
This signal is tri-stated during hardware, software and individual reset. Thus,
there is no need for an external pull-up in this state.
Internal Pull up resistor.
This input is 5 V tolerant.
Table 7. Serial Host Interface Signals (Continued)
Signal
Name
Signal
Type
State
during
Reset
Signal Description
相關PDF資料
PDF描述
DSR-09 PIANO DIP SWITCH-9SWITCHES, SPST, LATCHED,0.05A, 24VDC, THROUGH HOLE-STRAIGHT
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DP-10T PIANO DIP SWITCH-10SWITCHES, SPST, LATCHED,0.05A, 24VDC, THROUGH HOLE-RIGHT ANGLE
DS-03T PIANO DIP SWITCH-3SWITCHES, SPST, LATCHED,0.05A, 24VDC, THROUGH HOLE-STRAIGHT
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相關代理商/技術參數(shù)
參數(shù)描述
DSPA56371AF150 制造商:Freescale Semiconductor 功能描述:DSP FIXED-POINT 24-BIT 150MHZ 150MIPS 80-PIN LQFP TRAY - Trays
DSPA56371AF180 制造商:Freescale Semiconductor 功能描述:DSP FIXED-POINT 24-BIT 181MHZ 181MIPS 80-PIN LQFP TRAY - Trays
DSPA56720AG 制造商:Freescale Semiconductor 功能描述:DSP FIXED-POINT 24-BIT 200MHZ 200MIPS 144-PIN LQFP TRAY - Trays
DSPA56721AF 制造商:Freescale Semiconductor 功能描述:DSP FIXED-POINT 24-BIT 200MHZ 200MIPS 80-PIN LQFP TRAY - Bulk
DSPA56721AG 制造商:Freescale Semiconductor 功能描述:AUD PROCESSOR 144LQFP - Bulk
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