參數(shù)資料
型號(hào)： GE28F640W30B85
英文描述： EEPROM|FLASH|4MX16|CMOS|BGA|56PIN|PLASTIC
中文描述： 的EEPROM | FLASH動(dòng)畫| 4MX16 |的CMOS | BGA封裝| 56PIN |塑料
文件頁數(shù)： 85/91頁
文件大?。?/td> 994K
代理商： GE28F640W30B85
1.8 Volt Intel
Wireless Flash Memory with 3 Volt I/O
Datasheet
85
Table 34. Protection Register Information
Offset
(1)
Length
P = 39h
(P+E)h
Table 35. Burst Read Information for Non-muxed Device
Table 36. Partition and Erase-block Region Information
Description
Hex
Code Value
--01
(Optional flash features and commands)
Number of Protection register fields in JEDEC ID space.
“00h,” indicates that 256 protection fields are available
Add.
47:
1
1
(P+F)h
(P+10)h
(P+11)h
(P+12)h
4
Protection Field 1: Protection Description
This field describes user-available One Time Programmable
(OTP) Protection register bytes. Some are pre-programmed
with device-unique serial numbers. Others are user
programmable. Bits 0–15 point to the Protection register Lock
byte, the section’s first byte. The following bytes are factory
pre-programmed and user-programmable.
48:
49:
4A:
4B:
--80
--00
--03
--03
80h
00h
8 byte
8 byte
bits 0–7 = Lock/bytes Jedec-plane physical low address
bits 8–15 = Lock/bytes Jedec-plane physical high address
bits 16–23 = “n” such that 2n = factory pre-programmed bytes
bits 24–31 = “n” such that 2n = user programmable bytes
Offset
(1)
P = 39h
(P+13)h
Length
Description
Hex
Code Value
--03
(Optional flash features and commands)
Page Mode Read capability
bits 0–7 = “n” such that 2
n
HEX value represents the number of
read-page bytes. See offset 28h for device word width to
determine page-mode data output width. 00h indicates no
read page buffer.
Number of synchronous mode read configuration fields that
follow. 00h indicates no burst capability.
Synchronous mode read capability configuration 1
Bits 3–7 = Reserved
bits 0–2 “n” such that 2
n+1
HEX value represents the
maximum number of continuous synchronous reads when
the device is configured for its maximum word width. A value
of 07h indicates that the device is capable of continuous
linear bursts that will output data until the internal burst
counter reaches the end of the device’s burstable address
space. This field’s 3-bit value can be written directly to the
Read Configuration Register bits 0–2 if the device is
configured for its maximum word width. See offset 28h for
word width to determine the burst data output width.
Add.
4C:
1
8 byte
(P+14)h
1
4D:
--04
4
(P+15)h
1
4E:
--01
4
(P+16)h
(P+17)h
(P+18)h
1
1
1
Synchronous mode read capability configuration 2
Synchronous mode read capability configuration 3
Synchronous mode read capability configuration 4
4F:
50:
51:
--02
--03
--07
8
16
Cont
Offset
(1)
P = 39h
See table below
Address
Len
Bot
1
52:
Description
Bottom
(P+19)h
Top
(P+19)h
(Optional flash features and commands)
Number of device hardware-partition regions within the device.
x = 0: a single hardware partition device (no fields follow).
x specifies the number of device partition regions containing
one or more contiguous erase block regions.
Top
52:
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