參數(shù)資料
型號(hào)： GT-64010A
廠商： Galileo Technology Services, LLC
英文描述： System Controller with PCI Interface for R4XXX/ R5000 Family CPUs(帶PCI接口用于R4XXX/ R5000 系列 CPUs的系統(tǒng)控制器)
中文描述： 系統(tǒng)控制器的PCI R4XXX接口/ R5000系列處理器（帶的PCI接口用于R4XXX / R5000系列處理器的系統(tǒng)控制器）
文件頁數(shù)： 108/111頁
文件大?。?/td> 671K
代理商： GT-64010A
GT-64010A System Controller with PCI Interface for R4XXX/R5000 Family CPUs
96
R e v i s ion 1 . 1
Galileo
TechnologyTM
Notes:
1. System supports decrement.
2. System is litttle endian without decrement.
3. System is big endian without decrement.
4. dev_adr[21:0] is the output of the latch connected to AD[23:2], sampled by ALE.
5. Be careful if OEB is programmed at reset to have reverse polarity.
6. Regardless of endianess,
EWr[0]* always corresponds to SysAD[7:0], SysAD[39:32] and AD[7:0].
EWr[1]* always corresponds to SysAD[15:8], SysAD[47:40] and AD[15:8].
EWr[2]* always corresponds to SysAD[23:16], SysAD[55:48] and AD[23:16].
EWr[3]* always corresponds to SysAD[31:24], SysAD[63:56] and AD[31:24].
OWr[0]* always corresponds to SysAD[39:32] and AD[7:0].
OWr[1]* always corresponds to SysAD[47:40] and AD[15:8].
OWr[2]* always corresponds to SysAD[55:48] and AD[23:16].
OWr[3]* always corresponds to SysAD[63:56] and AD[31:24].
Device Data
(Bypass)
6
64-bit
SysAD[31:0]
SysAD[63:32]
Even bypass latch inputs
Odd bypass latch inputs
LEE
LEO
OE64*
Even bypass latch outputs
Odd bypass latch outputs
Even bank data pins
Odd bank data pins
Even bypass latch LE
Odd bypass latch LE
Even and odd bypass latches OE*
Device Control
64-bit
AD[31:0]
ALE
Control latch bit[0] output
Control latch bit[1] output
Control latch bit[23:2] outputs
Control latch bit[27:24] outputs
Control latch bit[31:28] outputs
Control latch inputs
Control latch LE
Becomes BootCS*
Becomes DevRW*
Becomes dev_adr [21:0]
Becomes DMAAck[3:0]*
Becomes CS[3:0]*
Connection
Memory
Width
Connect..
.
To...
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