參數(shù)資料
型號： GT-64010A
廠商： Galileo Technology Services, LLC
英文描述： System Controller with PCI Interface for R4XXX/ R5000 Family CPUs(帶PCI接口用于R4XXX/ R5000 系列 CPUs的系統(tǒng)控制器)
中文描述： 系統(tǒng)控制器的PCI R4XXX接口/ R5000系列處理器（帶的PCI接口用于R4XXX / R5000系列處理器的系統(tǒng)控制器）
文件頁數(shù)： 40/111頁
文件大小： 671K
代理商： GT-64010A
GT-64010A System Controller with PCI Interface for R4XXX/R5000 Family CPUs
34
R e v i s ion 1 . 1
Galileo
TechnologyTM
C h an n e l 0 Co n t r o l , O f f s et : 0x840
Bits
Field name
Function
Initial Value
0
Reserved
Must be ‘0’
0x0
1
Reserved
Must be ‘0’
0x0
3:2
SrcDir
Source Direction.
00 - Increment source address
01 - Decrement source address
10 - Hold in the same value
0x0
5:4
DestDir
Destination Direction.
00 - Increment destination address
01 - Decrement destination address
10 - Hold in the same value
0x0
8:6
DatTransLim
Data Transfer Limit in each DMA access.
101 - 1 Byte
110 - 2 Bytes
000 - 4 Bytes
001 - 8 Bytes
011 - 16 Bytes
111 - 32 Bytes
0x0
9
ChainMod
Chained Mode.
0 - Chained mode; when a DMA access is terminated,
the parameters of the next DMA access will come
from a record in memory that a NextRecPtr register
points at.
1 - Non-Chained mode; only the values that are pro-
grammed by the CPU (or PCI) directly into the ByteCt,
SrcAdd, and DestAdd registers are used.
0x0
10
IntMode
Interrupt Mode.
0 - Interrupt asserted every time the DMA byte count
reaches terminal count.
1 - Interrupt every NULL pointer (in Chained mode)
0x0
11
TransMod
Transfer Mode.
0 - Demand
1 - Block
0x0
12
ChanEn
Channel Enable.
0 - Disable
1 - Enable
0x0
13
FetNexRec
Fetch Next Record.
1 - Forces a fetch of the next record (even if the cur-
rent DMA has not ended). This bit is reset after fetch
is completed (meaningful only in Chained mode).
0x0
14
DMAActSt
DMA Activity Status (read only).
0 - Channel is not active
1 - Channel is active
0x0
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GT64010A-B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC
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