參數(shù)資料
型號(hào)： GT-64010A
廠商： Galileo Technology Services, LLC
英文描述： System Controller with PCI Interface for R4XXX/ R5000 Family CPUs(帶PCI接口用于R4XXX/ R5000 系列 CPUs的系統(tǒng)控制器)
中文描述： 系統(tǒng)控制器的PCI R4XXX接口/ R5000系列處理器（帶的PCI接口用于R4XXX / R5000系列處理器的系統(tǒng)控制器）
文件頁(yè)數(shù)： 51/111頁(yè)
文件大?。?/td> 671K
代理商： GT-64010A
GT-64010A System Controller with PCI Interface for R4XXX/R5000 Family CPUs
44
R e v i s ion 1 . 1
Galileo
TechnologyTM
C P U M ask , O f f set : 0xc1c
P C I M ask, O f f set : 0xc 24
5.15 PCI Configuration
The GT-64010A contains the required PCI configuration registers. These registers are accessed from both the CPU
and the PCI. The GT-64010A translates CPU read and write cycles into configuration cycles using the PCI configura-
tion mechanism #1. Mechanism #1 defines a way to translate the CPU cycles into both, PCI configuration cycles on the
PCI and accesses to the GT-64010A’s internal configuration registers. The GT-64010A includes two registers: Config-
uration Address (in offset 0xcf8) and Configuration Data (in offset 0xcfc). The general mechanism for accessing the
configuration registers is to write a value into Configuration Address that specifies the PCI bus, the device on that bus
and the configuration register in that device being accessed. A read or write to Configuration Data will then causes the
GT-64010A to translate that Configuration Address value to the requested cycle on the PCI bus. If the BusNum field in
the Configuration Address register equals ‘0’ but the DevNum field is other than ‘0’, a Type0 access is done which
addresses a device attached to the local PCI bus (for DevNum to IdSel mapping, refer to the table following this para-
graph). If the BusNum field in the Configuration Address register is other than ‘0’, a Type1 access is done which
addresses a device attached to a remote PCI bus. The CPU accesses the GT-64010A’s internal configuration registers
when the fields DevNum and BusNum in the Configuration Address register are equal to ‘0’. The GT-64010A configu-
ration registers are also accessed from the PCI using the normal PCI read and write configuration cycles.
Note: The CPU Interface unit cannot distinguish between an access to the GT-64010A PCI configuration space and an
access to some other PCI device configuration space. This is because both are accessed using an access to the GT-
64010A internal space (i.e. Configuration Data register). When the CPU is operating in big endian mode, any access to
the GT-64010A internal space undergoes byte swapping as all internal registers are little endian. With the CPU operat-
ing in big endian mode and the PCI ByteSwap bit (bit [0] @ 0xc00) set to ‘0’ (i.e., swap bytes), bytes will be swapped
once for PCI configuration accesses intended for the GT-64010A configuration space but will be swapped twice for PCI
configuration accesses intended for devices external to the GT-64010A. This requires the software to format write data
and interpret read data differently for PCI configuration accesses to the GT-64010A and configuration accesses
through the GT-64010A. See also appendix 11.1.
Bits
Field Name
Function
Initial Value
31:0
CPUMask
Mask to the CPU interrupt line for the appropriate bits
in the Interrupt Cause register. Bits 0, 25:21, 31:30
are read-only “0”.
0x00000000
Bits
Field Name
Function
Initial Value
31:0
PCIMask
Mask to the PCI interrupt line for the appropriate bits
in the Interrupt Cause register. Bits 0, 31:26 are read-
only “0”.
0x00000000
相關(guān)PDF資料
PDF描述
GT-64012 Secondary Cache Controller For the MIPS R4600/4650/4700/5000,(用于MIPS R4600/4650/4700/5000處理器的二級(jí)高速緩存控制器)
GT-64111 System Controller for RC4640, RM523X and VR4300 CPUs(用于RC4640, RM523X和 VR4300 CPUs的系統(tǒng)控制器)
GT-96100A Advanced Communication Controller That Handles a Wide Range of Serial Communication Protocols,such as Ethernet,Fast Ethernet,and HDLC(通信協(xié)議的高級(jí)通信協(xié)議（以太網(wǎng)、快速以太網(wǎng)、HDLC）控制器)
GT5-2/1S-HU RECTANGULAR CONNECTOR
GT5-1S-HU(A) RECTANGULAR CONNECTOR
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
GT64010A-B 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC
GT64010AB1 制造商:GALILEO 功能描述:*
GT64010A-P 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Peripheral IC
GT64011-A1-PBB-C000 制造商:Marvell 功能描述:
GT64115-A2-PBB-C000 制造商:Marvell 功能描述: 制造商:Marvell 功能描述:Marvell GT64115-A2-PBB-C000
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。

采購(gòu)需求

(若只采購(gòu)一條型號(hào)，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

發(fā)布成功！您可以繼續(xù)發(fā)布采購(gòu)。也可以進(jìn)入我的后臺(tái)，查看報(bào)價(jià)

*型號(hào) *數(shù)量 廠商 批號(hào) 封裝
添加更多采購(gòu)

我的聯(lián)系方式

*
*
*