238 HITACHI
Bits 6–4 (I/O control B2–B0 (IOB2–IOB0)): IOB2–IOB0 selects the GRB function.
Bit 6:
IOB2
Bit 5:
IOB1
Bit 4:
IOB0
GRB Function
0
0
0
GRB is an
output compare
register
Compare match with pin output disabled (initial value)
0 output at GRB compare match*
1
1 output at GRB compare match*
1
1
1
0
1
Output toggles at GRB compare match (1 output for
channel 2 only)*
1,
*
2
1
0
0
GRB is an
input capture
register
GRB captures rising edge of input
1
GRB captures falling edge of input
1
0
GRB captures both edges of input
1
Notes: 1. After reset, the value output is 0 until the first compare match occurs.
2. Channel 2 has no compare-match driven toggle output function. If it is set for toggle, 1
is automatically selected as the output.
Bit 3 (reserved): Bit 3 always reads as 1. The write value should always be 1.
Bits 2–0 (I/O control A2–A0 (IOA2–IOA0)): IOA2–IOA0 select the GRB function.
Bit 2:
IOA2
Bit 1:
IOA1
Bit 0:
IOA0
GRA Function
0
0
0
GRA is an
output compare
register
Compare match with pin output disabled (initial value)
0 output at GRA compare match*
1
1 output at GRA compare match*
1
1
1
0
1
Output toggles at GRA compare match (1 output for
channel 2 only)*
1,
*
2
1
0
0
GRA is an
input capture
register
GRA captures rising edge of input
1
GRA captures falling edge of input
1
0
GRA captures both edges of input
1
Notes: 1. After reset, the value output is 0 until the first compare match occurs.
2. Channel 2 has no compare-match driven toggle output function. If it is set for toggle, 1
is automatically selected as the output.