HITACHI 401
14.2
Register Configuration
Table 14.2 summarizes the registers of the pin function controller.
Table 14.2
Pin Function Controller Registers
Name
Abbreviation R/W
Initial Value
Address
Access Size
Port A I/O register
PAIOR
R/W
H'0000
H'5FFFFC4
8, 16, 32
Port A control register 1
PACR1
R/W
H'3302
H'5FFFFC8
8, 16, 32
Port A control register 2
PACR2
R/W
H'FF95
H'5FFFFCA
8, 16, 32
Port B I/O register
PBIOR
R/W
H'0000
H'5FFFFC6
8, 16, 32
Port B control register 1
PBCR1
R/W
H'0000
H'5FFFFCC
8, 16, 32
Port B control register 2
PBCR2
R/W
H'0000
H'5FFFFCE
8, 16, 32
Column address strobe
pin control register
CASCR
R/W
H'5FFF
H'5FFFFEE
8, 16, 32
14.3
Register Descriptions
14.3.1
Port A I/O Register (PAIOR)
The port A I/O register (PAIOR) is a 16-bit read/write register that selects input or output for
individual pins on a bit-by-bit basis. Bits PA15IOR–PA0IOR correspond to pins
PA15/
IRQ3
/
DREQ1
–PA0/
CS4
/TIOCA0. PAIOR is enabled when the port A pins function as
input/outputs (PA15–PA0) and for ITU input capture and output compare (TIOCA1, TIOCA0,
TIOCB1, and TIOCB0). For other functions, they are disabled. For port A pin functions PA15–
PA0 and TIOCA1, TIOCA0, TIOCB1, and TIOCB0, a given pin in port A is an output pin if its
corresponding PAIOR bit is set to 1, and an input pin if the bit is cleared to 0.
PAIOR is initialized to H'0000 by power-on resets; however, it is not initialized for manual resets,
standby mode, or sleep mode.