HITACHI 399
Section 14 Pin Function Controller (PFC)
14.1
Overview
The pin function controller (PFC) is composed of registers for selecting the function of
multiplexed pins and the direction of input/output. The pin function and input/output direction can
be selected for each pin individually without regard to the operating mode of the LSI. Table 14.1
lists the multiplexed pins.
Table 14.1
List of Multiplexed Pins
Port
Function 1
(related module)
Function 2
(related module)
IRQ3
input (INTC)
Function 3
(related module)
DREQ1
input
(DMAC)
Function 4
(related module)
Pin #
A
PA15 I/O (port)
—
68
A
PA14 I/O (port)
IRQ2
input (INTC)
DACK1 output
(DMAC)
TCLKB input (ITU)
DREQ0
input (DMAC)
—
67
A
PA13 I/O (port)
IRQ1
input (INTC)
IRQ0
input (INTC)
66
A
PA12 I/O (port)
TCLKA input (ITU) DACK0 output (DMAC) 65
A
PA11 I/O (port)
DPH I/O (D bus)
TIOCB1 I/O (ITU)
—
64
A
PA10 I/O (port)
DPL I/O (D bus)
AH
output (BSC)
BREQ
input
(system)
BACK
output
(system)
RD
output (BSC)
WRH
output
(BSC) (
LBS
output (BSC))*
1
WRL
output
(BSC) (
WR
output
(BSC))*
1
CS7
output (BSC)
CS6
output (BSC)
CS5
output (BSC)
CS4
output (BSC)
TIOCA1 I/O (ITU)
—
IRQOUT
output (INTC) 61
62
A
PA9 I/O (port)
—
A
PA8 I/O (port)
—
—
60
A
PA7 I/O (port)
—
—
58
A
PA6 I/O (port)
—
—
57
A
PA5 I/O (port)
—
—
56
A
PA4 I/O (port)
—
—
55
A
PA3 I/O (port)
WAIT
input (BSC)
—
54
A
PA2 I/O (port)
TIOCB0 I/O (ITU)
RAS
output (BSC)
—
53
A
PA1 I/O (port)
—
52
A
PA0 I/O (port)
TIOCA0 I/O (ITU)
—
51