HITACHI 400
Table 14.1
List of Multiplexed Pins (cont)
Port
Function 1
(related module)
Function 2
(related module)
IRQ7
input (INTC)
IRQ6
input (INTC)
IRQ5
input (INTC)
IRQ4
input (INTC)
Function 3
(related module)
Function 4
(related module)
Pin #
B
PB15 I/O (port)
—
TP15 output (TPC)
100
B
PB14 I/O (port)
—
TP14 output (TPC)
99
B
PB13 I/O (port)
SCK1 I/O (SCI)
TP13 output (TPC)
98
B
PB12 I/O (port)
SCK0 I/O (SCI)
TP12 output (TPC)
97
B
PB11 I/O (port)
TxD1 output (SCI)
TP11 output (TPC)
—
96
B
PB10 I/O (port)
RxD1 input (SCI)
TP10 output (TPC)
—
95
B
PB9 I/O (port)
TxD0 output (SCI)
TP9 output (TPC)
—
94
B
PB8 I/O (port)
RxD0 input (SCI)
TP8 output (TPC)
—
93
B
PB7 I/O (port)
TCLKD input (ITU)
TOCXB4 output (ITU)
TP7 output (TPC)
91
B
PB6 I/O (port)
TCLKC input (ITU)
TOCXA4 output (ITU)
TP6 output (TPC)
90
B
PB5 I/O (port)
TIOCB4 I/O (ITU)
TP5 output (TPC)
—
89
B
PB4 I/O (port)
TIOCA4 I/O (ITU)
TP4 output (TPC)
—
87
B
PB3 I/O (port)
TIOCB3 I/O (ITU)
TP3 output (TPC)
—
86
B
PB2 I/O (port)
TIOCA3 I/O (ITU)
TP2 output (TPC)
—
85
B
PB1 I/O (port)
TIOCB2 I/O (ITU)
TP1 output (TPC)
—
84
B
PB0 I/O (port)
CS1
output
(BSC)
CS3
output
(BSC)
INTC: Interrupt controller
DMAC: Direct memory access controller
ITU: 16-bit integrated timer pulse unit
D bus: Data bus control
BSC: Bus state controller
System: System control
SCI: Serial communications interface
TPC: Programmable timing pattern controller
Port: I/O port
Notes: 1. The bus control register of the bus state controller handles switching between the two
functions.
TIOCA2 I/O (ITU)
CASH
output
(BSC)
CASL
output
(BSC)
TP0 output (TPC)
—
83
—
—
—
47
—
—
—
49