- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄370702 > HSP3824VI (Harris Corporation) Direct Sequence Spread Spectrum Baseband Processor PDF資料下載
參數(shù)資料
| 型號： | HSP3824VI |
| 廠商： | Harris Corporation |
| 元件分類： | 基帶處理器 |
| 英文描述： | Direct Sequence Spread Spectrum Baseband Processor |
| 中文描述： | 直接序列擴頻基帶處理器 |
| 文件頁數(shù)： | 21/41頁 |
| 文件大?。?/td> | 276K |
| 代理商： | HSP3824VI |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁當前第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁
21
HSP3824
acquisition decision. This worst case time line example
assumes that the signal is present on antenna A1 only (A2 is
blocked). It further assumes that the signal arrives part way
into the first A1 dwell such as to just barely miss detection.
The signal and the scanning process are asynchronous and
the signal could start anywhere. In this timeline, it is assumed
that all 16 symbols are present, but they were missed due to
power amplifier ramp up. Since A2 has insufficient signal, the
first A2 dwell after the start of the preamble also fails detec-
tion. The second A1 dwell after signal start is successful and a
symbol timing measurement is achieved.
Meanwhile signal quality and signal frequency measure-
ments are made simultaneous with symbol timing measure-
ments. When the bit sync level, SQ1, and Phase variance
SQ2 are above their user programmable thresholds, the sig-
nal is declared present for the antenna with the best signal.
More details on the Signal Quality estimates and their pro-
grammability are given in the Acquisition Signal Quality
Parameters section of this document.
At the end of each dwell, a decision is made based on the rel-
ative values of the signal qualities of the signals on the two
antennas. In the example, antenna A1 is the one selected, so
the recorded symbol timing and carrier frequency for A1 are
used thereafter for the symbol timing and the PLL of the NCO
to begin carrier de-rotation and demodulation.
Prior to initial acquisition the NCO was inactive and DPSK
demodulation processing was used. Carrier phase measure-
ment are done on a symbol by symbol basis afterward and
coherent DPSK demodulation is in effect. After a brief setup
time as illustrated on the timeline of Figure 15, the signal
begins to emerge from the demodulator.
If the descrambler is used it takes 7 more symbols to seed
the descrambler before valid data is available. This occurs in
time for the SFD to be received. At this time the demodulator
is tracking and in the coherent PSK demodulation mode it
will no longer scan antennas.
One Antenna Acquisition
When only one antenna is being used, the user can delete
the antenna switch and shorten the acquisition sequence.
Figure 16 shows the single antenna acquisition timeline. It
uses a 78 symbol sequence with 2 more for power ramping
of the RF front of the radio. This scheme deletes the second
antenna dwells but performs the same otherwise. It verifies
the signal after initial detection for lower false alarm proba-
bility.
Acquisition Signal Quality Parameters
Two measures of signal quality are used to determine acqui-
sition and drop lock decisions. The first method of determin-
ing signal presence is to measure the correlator output (or
bit sync) amplitude. This measure, however, flattens out in
the range of high BER and is sensitive to signal amplitude.
The second measure is phase noise and in most BER sce-
narios it is a better indication of good signals plus it is insen-
sitive to signal amplitude. The bit sync amplitude and phase
noise are integrated over each block of 16 symbols used in
acquisition or over blocks of 128 symbols in the data demod-
ulation mode. The bit sync amplitude measurement repre-
sents the peak of the correlation out of the PN correlator.
Figure 17 shows the correlation process. The signal is sam-
pled at twice the chip rate (i.e. 22 MSPS). The one sample
that falls closest to the peak is used for a bit sync amplitude
sample for each symbol. This sample is called the on-time
sample. High bit sync amplitude means a good signal. The
early and late samples are the two adjacent samples and
are used for tracking.
The other signal quality measurement is based on phase
noise and that is taken by sampling the correlator output at the
correlator peaks. The phase changes due to scrambling are
removed by differential demodulation during initial acquisition.
Then the phase, the phase rate and the phase variance are
measured and integrated for 16 symbols. The phase variance
is used for the phase noise signal quality measure. Low phase
noise means a stronger received signal.
Procedure to Set Acq. Signal Quality
Parameters (Example)
There are four registers that set the acquisition signal quality
thresholds,
they
are:
CR
(RX_SQX_IN_ACQ). Each threshold consists of two bytes,
high and low that hold a 16-bit number.
22,
23,
30,
and
31
FIGURE 17. CORRELATION PROCESS
T0 + 1
μ
s
CORRELATOR
OUTPUT
REPEATS
CORRELATION
PEAK
T0 + 2
μ
s
T0
CORRELATOR OUTPUT IS
THE RESULT OF CORRELATING
THE PN SEQUENCE WITH THE
RECEIVED SIGNAL
SAMPLES
AT 2X CHIP
RATE
EARLY
ON-TIME
LATE
CORRELATION TIME
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| HSR101 | Silicon Schottky Barrier Diode for Various detector, High speed switching(用于多種檢波和高速開關(guān)的肖特基勢壘二極管) |
| HSRD1056RH165S | Converter IC |
| HSRD1056RH169H | Converter IC |
| HSRD1056RH169S | Converter IC |
| HSRD1056RH240H | Converter IC |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| HSP3824VI96S5001 | 制造商:Harris Corporation 功能描述: |
| HSP40223221 | 制造商:PARMAR 功能描述:BALLAST HPS/MH 400W 制造商:PARMAR 功能描述:BALLAST, HPS/MH, 400W |
| HSP4070C | 制造商:JLWORLD 制造商全稱:JLWORLD 功能描述:SPEAKER SOUND GENERATORS |
| HSP40G-8 | 制造商:JLWORLD 制造商全稱:JLWORLD 功能描述:SPEAKER SOUND GENERATORS |
| HSP43124 | 制造商:INTERSIL 制造商全稱:Intersil Corporation 功能描述:Serial I/O Filter |
發(fā)布緊急采購，3分鐘左右您將得到回復。