34
HSP3824
CONFIGURATION REGISTER 28 ADDRESS (70h) RX SIGNAL QUALITY 1 DATA (high) THRESHOLD READ (HIGH)
Bits 0 - 7
This status register contains the upper byte bits (8-14) of the measured signal quality of bit sync amplitude used for
drop lock decisions. This register combined with the lower byte represents a 15-bit value, representing the measured
signal quality for the bit sync amplitude. This measurement is made every 128 symbols.
CONFIGURATION REGISTER 29 ADDRESS (74h) RX SIGNAL QUALITY 1 DATA THRESHOLD READ (LOW)
Bits 0 - 7
This register contains the lower byte bits (0-7) of the measured signal quality of bit sync amplitude used for drop lock
decisions. This register combined with the lower byte represents a 16-bit value, representing the measured signal qual-
ity for the bit sync amplitude. This measurement is made every 128 symbols.
CONFIGURATION REGISTER 30 ADDRESS (78h) RX SIGNAL QUALITY 2 ACQ THRESHOLD (HIGH)
Bits 0 - 7
This control register contains the upper byte bits (8-15) of the carrier phase variance threshold used for acquisition.
This register combined with the lower byte represents a 16-bit threshold value for carrier phase variance measurement
made during acquisition at each antenna dwell and is based on the choice of the best antenna. This threshold is used
with the bit sync threshold in registers 22 and 23 to declare acquisition. A higher value in this threshold will increase
the probability of acquisition and false alarm.
CONFIGURATION REGISTER 31 ADDRESS (7Ch) RX SIGNAL QUALITY 2 ACQ THRESHOLD (LOW)
Bits 0 - 7
This control register contains the lower byte bits (0-7) of the carrier phase variance threshold used for acquisition.
CONFIGURATION REGISTER 32 ADDRESS (80h) RX SIGNAL QUALITY 2 ACQ READ (HIGH)
Bits 0 - 7
This status register contains the upper byte bits (8-15) of the measured signal quality of the carrier phase variance
used for acquisition. This register combined with the lower byte generates a 16-bit value, representing the measured
signal quality of the carrier phase variance. This measurement is made during acquisition at each antenna dwell and
is based on the selected best antenna.
CONFIGURATION REGISTER 33 ADDRESS (84h) RX SIGNAL QUALITY 2 ACQ READ (LOW)
Bits 0 - 7
This status register contains the lower byte bits (0-7) of the measured signal quality of the carrier phase variance used
for acquisition. This register combined with the lower byte generates a 16-bit value, representing the measured signal
quality of the carrier phase variance. This measurement is made during acquisition at each antenna dwell and is based
on the selected best antenna
CONFIGURATION REGISTER 34 ADDRESS (88h) RX SIGNAL QUALITY 2 DATA THRESHOLD (HIGH)
Bits 0-7
This control register contains the upper byte bits (8-15) of the carrier phase variance threshold. This register combined
with the lower byte represents a 16-bit threshold value for the carrier phase variance signal quality measurements
made every 128 symbols.
CONFIGURATION REGISTER 35 ADDRESS (8Ch) RX SIGNAL QUALITY 2 DATA THRESHOLD (LOW)
Bits 0-7
This control register contains the lower byte bits (0-7) of the carrier phase variance threshold. This register combined
with the upper byte) represents a 16-bit threshold value for the carrier phase variance signal quality measurements
made every 128 symbols.
CONFIGURATION REGISTER 36 ADDRESS (90h) RX SIGNAL QUALITY 2 DATA READ (HIGH)
Bits 0-7
This status register contains the upper byte bits (8-15) of the measured signal quality of the carrier phase variance.
This register combined with the lower byte represents a 16-bit value, of the measured carrier phase variance. This
measurement is made every 128 symbols.
CONFIGURATION REGISTER 37 ADDRESS (94h) RX SIGNAL QUALITY 2 DATA READ (LOW)
Bits 0-7
This register contains the lower byte bits (0-7) of the measured signal quality of the carrier phase variance. This register
combined with the represents a 16-bit value, of the measured carrier phase variance. This measurement is made every
128 symbols.
CONFIGURATION REGISTER ADDRESS 38 (98h) RX SIGNAL QUALITY 8-BIT READ
Bits 0 - 7
This 8-bit register contains the bit sync amplitude signal quality measurement derived from the 16-bit Bit Sync signal
quality value stored in the CR28-29 registers. This value is the result of the signal quality measurement for the best
antenna dwell. The signal quality measurement provides 256 levels of signal to noise measurement.