參數(shù)資料
型號(hào)： HSP3824VI
廠商： Harris Corporation
元件分類： 基帶處理器
英文描述： Direct Sequence Spread Spectrum Baseband Processor
中文描述： 直接序列擴(kuò)頻基帶處理器
文件頁數(shù)： 32/41頁
文件大?。?/td> 276K
代理商： HSP3824VI
32
HSP3824
CONFIGURATION REGISTER 14 ADDRESS (38h) TX SPREAD SEQUENCE (LOW)
Bits 0 - 7
This 8-bit register is programmed with the lower byte of the transmit spreading code. This code is used for the I and Q
signalling paths of the transmitter. This register combined with the higher byte TX_SPREAD(HIGH) generates the
transmit spreading code programmable up to 16 bits.
The example below illustrates the bit positioning for one of the 11 bit Barker PN codes.
Example:
Transmit Spreading Code 11-Bit Barker Word Right Justified MSB First.
CONFIGURATION REGISTER 15 ADDRESS (3Ch) SCRAMBLER SEED
Bits 0 - 7
This register contains the 7-bit (seed) value for the transmit scrambler which is used to preset the transmit scrambler
to a known starting state. The MSB bit position (7) is unused and must be programmed to a Logic 0. The example
below illustrates the bit positioning of seed.
CONFIGURATION REGISTER 16 ADDRESS (40h) SCRAMBLER TAP
Bits 0 - 7
This register is used to configure the transmit scrambler with a 7-bit polynomial tap configuration. The transmit scram-
bler is a 7-bit shift register, with 7 configurable taps. A logic 1 is the respective bit position enables that particular tap.
The MSB bit 7 is not used and it is set to a Logic 0. The example below illustrates the register configuration for the
polynomial F(x) = 1 + X
-4
+X
-7
. Each clock is a shift left
CONFIGURATION REGISTER 17 ADDRESS (44h)CCA TIMER THRESHOLD
Bits 0 - 7
This 8-bit register is used to configure the period of the time-out threshold of the CCA watchdog timer. If the channel
is busy the timer counts until it reaches the programmed value and at that point it declares that the channel is clear
independent of the actual energy measured within the channel. This register is programmable up to 8 bits.
For example, for a chip rate of 11 MCPS and a desired timeout of ~11ms, N = 2ch.
CONFIGURATION REGISTER 18 ADDRESS (48h) CCA CYCLE THRESHOLD
Bits 0 - 7
This 8-bit register is used to configure how many times the CCA timer is allowed to reach its maximum count before
the channel is declared clear for transmission independent of the actual energy in the channel. This is an outer counter
loop of the CCA timer. Each increment represents a time out of the CCA timer. Use a value of 03h for a time out of 2
CCA timer counts.
MSB
LSB
TX_SPREAD(HIGH)
15 14 13 12 11 10 9 8
TX_SPREAD(LOW)
7 6 5 4 3 2 1 0
11-bit Barker code
X
X
X X X 1 0 1
1 0 1 1 1 0 0 0
LSB
Bits (0:7)
7 6 5 4 3 2 1 0
XZ
-7
Z
-6
Z
-5
Z
4
Z
-3
Z
-2
Z
-1
Scrambler Taps
F(x) = 1 + X
-4
+X
-7
0 1 0 0 1 0 0 0
Time (ms)
1000
--------------------------
, where N is the programmable value of CR17.
=
LSB
Bits (0:7)
7 6 5 4 3 2 1 0
0 0 0 0 0 0 1 0
02h (Min)
CCA_TIMER_TH
1 1 1 1 1 1 1 1
FFh (Max)
MSB
LSB
Bits (0:7)
7 6 5 4 3 2 1 0
0 0 0 0 0 0 1 0
2h; 1 CCA timer (Min)
CCA_TIMER_TH
1 1 1 1 1 1 1 1
FFh; 256 CCA timer (Max)
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