參數(shù)資料
型號: IBM21P100BGB
元件分類: 總線控制器
英文描述: PCI BUS CONTROLLER, PBGA304
封裝: 31 X 31 MM, HEAT SINK, PLASTIC, BGA-304
文件頁數(shù): 112/140頁
文件大?。?/td> 2032K
代理商: IBM21P100BGB
IBM21P100BGB
IBM 133 PCI-X Bridge R1.1
ppb11_pcix_regs.fm.03
July 9, 2001
Configuration Registers
Page 65 of 131
1RW
Primary Retry Count SERR# Disable
Controls the SERR# assertion when the primary retry counter has expired.
0
Assert SERR# and update status bit 14 in the Status register if the primary retry counter expires and
SERR# enable bit 8 in the Command register is set. Discard the transaction and set bit 1 of the Retry
and Timer Status register.
1
Disable the assertion of SERR# if the primary retry counter expires. Discard the transaction and set bit
1 of the Retry and Timer Status register.
0RW
Secondary Retry Count SERR# Disable
Controls the SERR# assertion when the secondary retry counter has expired.
0
Assert SERR# and update status bit 14 in the Status register if the secondary retry counter expires
and SERR# enable bit 8 in the Command register is set. Discard the transaction and set bit 1 of the
Retry and Timer Status register.
1
Disable the assertion of SERR# if the secondary retry counter expires. Discard the transaction and set
bit 1 of the Retry and Timer Status register.
Bit(s)
Access
Field Name and Description
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