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參數(shù)資料
| 型號(hào)： | IBM21P100BGB |
| 元件分類(lèi)： | 總線控制器 |
| 英文描述： | PCI BUS CONTROLLER, PBGA304 |
| 封裝： | 31 X 31 MM, HEAT SINK, PLASTIC, BGA-304 |
| 文件頁(yè)數(shù)： | 24/140頁(yè) |
| 文件大?。?/td> | 2032K |
| 代理商： | IBM21P100BGB |
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IBM21P100BGB
IBM 133 PCI-X Bridge R1.1
Preface
Page 4 of 131
ppb11_preface.fm.03
July 9, 2001
1.4.1 Units of Measure
Prefixes: K=1024 k=1000.
Bits and Bytes: An upper-case ‘B’ stands for bytes. Example: 1 KB means 1024 bytes.
A lower-case ‘b’ refers to bits (see
Numeric Notation below for when ‘b’ denotes a binary value).
Example: 1Kb means 1024 bits.
Trailing pound signs, e.g., P_ACK64#, designate signals that are active low.
1.4.2 Numeric Notation
Hexadecimal values are in single quotes and preceded by x. For example: x‘0B00’.
Undefined hexadecimal values are indicated by a capital X. For example: x’X1’ = undefined on reset.
Binary values are spelled out (zero and one) or appear in single quotes and preceded by b.
For example: b‘0101’.
1.5 References
1.
PCI Local Bus Specification, Revision 2.2, December 18, 1998
2.
PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0a, July 24, 2000
3.
PCI-to-PCI Bridge Architecture Specification, Revision 1.1, December 18, 1998
4.
PCI Power Management Interface Specification, Revision 1.1, December 18, 1998
These specifications are downloadable for members of the PCI Special Interest Group (you will be prompted
for a username and password) from the group’s web page at http://www.pcisig.com.
1.6 Document Nomenclature
Bytes, Words, DWords,
and QWords
When used in this document, the term
byte refers to a field containing eight bits and
the term
word means a field containing sixteen bits or two bytes. Hence, a double
word (abbreviated DWord or DW) contains 32 bits or four bytes, and a quadword
(abbreviated QWord or QW) is made up of 64 bits or eight bytes. These entities are
assumed to be naturally aligned on the appropriate boundary, thus the least signifi-
cant three bits of address of a QWord are zeros.
Bit and Byte Numbering
All bit and byte numbering in this specification is given in “l(fā)ittle endian” notation. Bit 0
is the least significant bit (lsb) and byte 0 is the least significant byte (LSB). Any
exceptions to this will be specifically noted to avoid any confusion. Bit ranges are
given by two numbers separated by a colon and enclosed in parentheses (for
example, (7:0)); the first number in the range indicates the msb or most significant
bit and the last number indicates the lsb.
Destination Bus
For transactions that cross the bridge, the bus on which the completer of a transac-
tion resides.
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| IBM25EMPPC603EFG-100 | 32-BIT, 100 MHz, RISC PROCESSOR, PQFP240 |
| IBM25EMPPC603EBG-100 | 32-BIT, 100 MHz, RISC PROCESSOR, CBGA255 |
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