參數資料
型號: ICS1892
英文描述: 10Base-T/100Base-TX Integrated PHYceiver
文件頁數: 130/148頁
文件大?。?/td> 816K
代理商: ICS1892
ICS1892, Rev. D, 2/26/01
February 26, 2001
130
Chapter 10
DC and AC Operating Conditions
ICS1892 Data Sheet
2000-2001, Integrated Circuit Systems, Inc.
All rights reserved.
10.5.7
MII Management Interface Timing
Table 10-14
lists the significant time periods for the MII Management Interface timing (which consists of
timings of signals on the MDC and MDIO pins).
Figure 10-7
shows the timing diagram for the time periods.
All ICS1892 parts are tested at 25 MHz (a 40-ns period) with a 50-pF load. Designs must account for all board loading
of MDC.
Figure 10-7.
MII Management Interface Timing Diagram
Table 10-14.
MII Management Interface Timing
Time
Period
Parameter
Conditions
Min.
Typ.
Max.
Units
t1
MDC Minimum High Time
160
ns
t2
MDC Minimum Low Time
160
ns
t3
MDC Period
400
ns
t4
MDC Rise Time to MDIO Valid
0
300
ns
t5
MDIO Setup Time to MDC
10
ns
t6
MDIO Hold Time after MDC
10
ns
MDC
MDIO
(Output)
MDC
MDIO
(Input)
t1
t2
t3
t4
t5
t6
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相關代理商/技術參數
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ICS1892Y 制造商:ICS 制造商全稱:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver
ICS1892Y-10 制造商:ICS 制造商全稱:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver
ICS1892Y-14 制造商:ICS 制造商全稱:ICS 功能描述:10Base-T/100Base-TX Integrated PHYceiver
ICS1893 制造商:ICS 制造商全稱:ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver
ICS1893_09 制造商:ICS 制造商全稱:ICS 功能描述:3.3-V 10Base-T/100Base-TX Integrated PHYceiver?