參數(shù)資料
型號(hào): ISP1362EE,551
廠商: NXP SEMICONDUCTORS
元件分類: 總線控制器
英文描述: UNIVERSAL SERIAL BUS CONTROLLER, PBGA64
封裝: 6 X 6 MM, 0.80 HEIGHT, PLASTIC, MO-195, SOT-543-1, TFBGA-64
文件頁數(shù): 126/152頁
文件大?。?/td> 677K
代理商: ISP1362EE,551
ISP1362_5
NXP B.V. 2007. All rights reserved.
Product data sheet
Rev. 05 — 8 May 2007
75 of 152
NXP Semiconductors
ISP1362
Single-chip USB OTG Controller
14.1.6 HcInterruptDisable register (R/W: 05h/85h)
Each disable bit in the HcInterruptDisable register corresponds to an associated interrupt
bit in the HcInterruptStatus register. The HcInterruptDisable register is coupled with the
HcInterruptEnable register. Therefore, writing logic 1 to a bit in this register clears the
corresponding bit in the HcInterruptEnable register, whereas writing logic 0 to a bit in this
register leaves the corresponding bit in the HcInterruptEnable register unchanged. On a
read, the current value of the HcInterruptEnable register is returned. Table 45 provides the
bit allocation of the HcInterruptDisable register.
Code (Hex): 05 — read
Code (Hex): 85 — write
Bit
23
22
21
20
19
18
17
16
Symbol
reserved
Reset
--------
Access
--------
Bit
15
14
13
12
11
10
9
8
Symbol
reserved
Reset
--------
Access
--------
Bit
7
6
5
4
3
2
1
0
Symbol
reserved
RHSC
FNO
UE
RD
SF
reserved
SO
Reset
-
00000
-
0
Access
-
R/W
-
R/W
Table 44.
HcInterruptEnable register: bit description
Bit
Symbol
Description
31
MIE
MasterInterruptEnable by the HCD: Logic 0 is ignored by the Host
Controller. Logic 1 enables interrupt generation by events specied in
other bits of this register.
30 to 7
-
reserved
6
RHSC
0 — ignore
1 — enable interrupt generation because of root hub status change
5
FNO
0 — ignore
1 — enable interrupt generation because of frame number overow
4UE
0 — ignore
1 — enable interrupt generation because of unrecoverable error
3RD
0 — ignore
1 — enable interrupt generation because of resume detect
2SF
0 — ignore
1 — enable interrupt generation because of start-of-frame
1
-
reserved
0SO
0 — ignore
1 — enable interrupt generation because of scheduling overrun
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