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| 型號(hào)： | MFRC53001T |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類(lèi)： | 通信及網(wǎng)絡(luò) |
| 英文描述： | ISO-IEC 14443 A Reader IC |
| 封裝： | MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 5, 2005,;MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1 |
| 文件頁(yè)數(shù)： | 20/115頁(yè) |
| 文件大?。?/td> | 2590K |
| 代理商： | MFRC53001T |
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MFRC530_33
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 6 July 2010
057433
20 of 115
NXP Semiconductors
MFRC530
ISO/IEC 14443 A Reader IC
Example:
Writing 3Fh to the InterruptRq register clears all bits. SetIRq is set to logic 0
while all other bits are set to logic 1. Writing 81h to the InterruptRq register sets LoAlertIRq
to logic 1 and leaves all other bits unchanged.
9.4.3
Configuration of pin IRQ
The logic level of the IRq flag bit is visible on pin IRQ. The signal on pin IRQ can also be
controlled using the following IRQPinConfig register bits.
bit IRQInv: the signal on pin IRQ is equal to the logic level of bit IRq when this bit is set
to logic 0. When set to logic 1, the signal on pin IRQ is inverted with respect to bit IRq.
bit IRQPushPull: when set to logic 1, pin IRQ has CMOS output characteristics. When
it is set to logic 0, it is an open-drain output which requires an external resistor to
achieve a HIGH-level at pin IRQ.
Remark:
During the reset phase (see
Section 9.7.2 on page 26
) bit IRQInv is set to
logic 1 and bit IRQPushPull is set to logic 0. This results in a high-impedance on pin IRQ.
9.4.4
Register overview interrupt request system
Table 22
shows the related interrupt request system flags in alphabetically.
Table 22.
Flags
HiAlertIEn
HiAlertIRq
IdleIEn
IdleIRq
IRq
IRQInv
IRQPushPull
LoAlertIEn
LoAlertIRq
RxIEn
RxIRq
SetIEn
SetIRq
TimerIEn
TimerIRq
TxIEn
TxIRq
Associated Interrupt request system registers and flags
Register name
InterruptEn
InterruptRq
InterruptEn
InterruptRq
PrimaryStatus
IRQPinConfig
IRQPinConfig
InterruptEn
InterruptRq
InterruptEn
InterruptRq
InterruptEn
InterruptRq
InterruptEn
InterruptRq
InterruptEn
InterruptRq
Bit
1
1
2
2
3
1
0
0
0
3
3
7
7
5
5
4
4
Register address
06h
07h
06h
07h
03h
07h
07h
06h
07h
06h
07h
06h
07h
06h
07h
06h
07h
相關(guān)PDF資料 |
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| MFRC53101T | ISO-IEC 14443 reader IC |
| MFRX85201HD | Secure contactless reader solution |
| MMBD4148 | High-speed switching diode |
| MMBD6050-V-GS08 | SWITING 70V 0.2A 3PIN SOT-23 - Tape and Reel |
| MMBD6050-V-GS18 | SWITING 70V 0.2A 3PIN SOT-23 - Tape and Reel |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MFRC53001T/0FE | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:ISO/IEC 14443 A Reader IC |
| MFRC53001T/0FE,112 | 功能描述:RFID應(yīng)答器 MIFARE HS READER RoHS:否 制造商:Murata 存儲(chǔ)容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| MFRC53001T/0FE,518 | 功能描述:RFID應(yīng)答器 IC READER 13.56MHZ RoHS:否 制造商:Murata 存儲(chǔ)容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| MFRC53001T/0FE112 | 制造商:NXP Semiconductors 功能描述:CNTCLESS RC 3.3V ISO14443-A/B |
| MFRC531 | 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Short Form Specification |
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