參數(shù)資料
型號： MFRC53001T
廠商： NXP Semiconductors N.V.
元件分類： 通信及網(wǎng)絡(luò)
英文描述： ISO-IEC 14443 A Reader IC
封裝： MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 5, 2005,;MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1
文件頁數(shù)： 80/115頁
文件大小： 2590K
代理商： MFRC53001T
MFRC530_33
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 6 July 2010
057433
80 of 115
NXP Semiconductors
MFRC530
ISO/IEC 14443 A Reader IC
11.2.2.5
Communication errors
The events which can set error flags are shown in
Table 139
.
Table 139. Communication error table
Cause
Received data did not start with the SOF pattern
CRC block is not equal to the expected value
Received data is shorter than the CRC block
The parity bit is not equal to the expected value (i.e. a bit-collision, not parity)
A bit-collision is detected
11.2.3
Transceive command 1Eh
Table 140. Transceive command 1Eh
Command
Value
The Transceive command first executes the Transmit command (see
Section 11.2.1 on
page 74
) and then starts the Receive command (see
Section 11.2.2 on page 77
). All data
transmitted is sent using the FIFO buffer and all data received is written to the FIFO buffer.
The Transceive command can only be started by the microprocessor.
Remark:
To adjust the timing relationship between transmitting and receiving, use the
RxWait register. This register is used to define the time delay between the last bit
transmitted and activation of the receiver. In addition, the BitPhase register determines the
phase-shift between the transmitter and receiver clock.
11.2.4
Card communication states
The status of the transmitter and receiver state machine can be read from bits
ModemState[2:0] in the PrimaryStatus register.
The assignment of ModemState[2:0] to the internal action is shown in
Table 141
.
Table 141. Meaning of ModemState
ModemState
[2:0]
000
Idle
001
TxSOF
010
TxData
Flag bit
FramingErr
CRCErr
CRCErr
ParityErr
CollErr
Action
Arguments
and data
data stream
Returned
data
data stream
Transceive
1Eh
transmits data from FIFO buffer to the card
and then automatically activates the
receiver
State
Description
transmitter and/or receiver are not operating
transmitting the SOF pattern
transmitting data or redundancy check (CRC) bits from the FIFO
buffer
transmitting the EOF pattern
intermediate state passed, when receiver starts
intermediate state passed, when receiver finishes
waiting until the RxWait register time period expires
receiver activated; waiting for an input signal on pin RX
receiving data
011
100
TxEOF
GoToRx1
GoToRx2
PrepareRx
AwaitingRx
Receiving
101
110
111
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