參數(shù)資料
型號(hào): MFRC53001T
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: ISO-IEC 14443 A Reader IC
封裝: MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 5, 2005,;MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1
文件頁(yè)數(shù): 66/115頁(yè)
文件大小: 2590K
代理商: MFRC53001T
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MFRC530_33
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 6 July 2010
057433
66 of 115
NXP Semiconductors
MFRC530
ISO/IEC 14443 A Reader IC
10.5.6
Page 5: FIFO, timer and IRQ pin configuration
10.5.6.1
Page register
Selects the page register; see
Section 10.5.1.1 “Page register” on page 46
.
10.5.6.2
FIFOLevel register
Defines the levels for FIFO underflow and overflow warning.
Table 111. FIFOLevel register (address: 29h) reset value: 0000 1000b, 08h bit allocation
Bit
7
6
5
Symbol
00
Access
R/W
Table 112. FIFOLevel register bit descriptions
Bit
Symbol
7 to 6 00
5 to 0 WaterLevel[5:0] defines, the warning level of a FIFO buffer overflow or underflow:
HiAlert is set to logic 1 if the remaining FIFO buffer space is equal to,
or less than, WaterLevel[5:0] bits in the FIFO buffer.
LoAlert is set to logic 1 if equal to, or less than, WaterLevel[5:0] bits in
the FIFO buffer.
10.5.6.3
TimerClock register
Selects the divider for the timer clock.
Table 113. TimerClock register (address: 2Ah) reset value: 0000 0111b, 07h bit allocation
Bit
7
6
5
Symbol
00
TAutoRestart
Access
RW
RW
Table 114. TimerClock register bit descriptions
Bit
Symbol
7 to 6
00
5
TAutoRestart
4
3
2
1
0
WaterLevel[5:0]
R/W
Description
these values must not be changed
4
3
2
1
0
TPreScaler[4:0]
RW
Value
0
1
Function
these values must not be changed
the timer automatically restarts its countdown from the
TReloadValue[7:0] instead of counting down to zero
the timer decrements to zero and register InterruptIRq
TimerIRq bit is set to logic 1
defines the timer clock frequency (f
TimerClock
). The
TPreScaler[4:0] can be adjusted from 0 to 21. The following
formula is used to calculate the TimerClock frequency
(f
TimerClock
):
f
TimerClock
= 13.56 MHz / 2
TPreScaler
[MHz]
0
4 to 0
TPreScaler[4:0]
-
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