參數(shù)資料
型號: MFRC53001T
廠商: NXP Semiconductors N.V.
元件分類: 通信及網(wǎng)絡(luò)
英文描述: ISO-IEC 14443 A Reader IC
封裝: MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 5, 2005,;MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1
文件頁數(shù): 8/115頁
文件大?。?/td> 2590K
代理商: MFRC53001T
MFRC530_33
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NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 6 July 2010
057433
8 of 115
NXP Semiconductors
MFRC530
ISO/IEC 14443 A Reader IC
9.1.3
Connection to different microprocessor types
The connection to various microprocessor types is shown in
Table 5
.
Table 5.
MFRC530
pins
9.1.3.1
Separate read and write strobe
Refer to
Section 13.4.1 on page 91
for timing specification.
Connection scheme for detecting the parallel interface type
Parallel interface type and signals
Separated read/write strobe Common read/write strobe
Dedicated
address bus
address
bus
HIGH
ALE
A2
LOW
A1
HIGH
A0
HIGH
NRD
NRD
NWR
NWR
NCS
NCS
D7 to D0
AD7 to AD0
Multiplexed
Dedicated
address bus
Multiplexed
address bus
Multiplexed
address bus with
handshake
nAStrb
HIGH
HIGH
nWait
nDStrb
nWrite
LOW
AD7 to AD0
ALE
A2
A1
A0
NRD
NWR
NCS
D7 to D0
HIGH
A2
A1
A0
NDS
R/NW
NCS
D7 to D0
AS
LOW
HIGH
LOW
NDS
R/NW
NCS
AD7 to AD0
Fig 3.
Connection to microprocessor: separate read and write strobes
001aak607
address bus (A3 to An)
NCS
A0 to A2
address bus (A0 to A2)
D0 to D7
ALE
data bus (D0 to D7)
HIGH
NRD
Read strobe (NRD)
NWR
Write strobe (NWR)
DEVICE
ADDRESS
DECODER
non-multiplexed address
NCS
AD0 to AD7
ALE
multiplexed address/data (AD0 to AD7)
address latch enable (ALE)
NRD
Read strobe (NRD)
NWR
Write strobe (NWR)
A2
LOW
A1
HIGH
A0
HIGH
DEVICE
ADDRESS
DECODER
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