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| 型號： | MFRC53001T |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | ISO-IEC 14443 A Reader IC |
| 封裝： | MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 5, 2005,;MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1 |
| 文件頁數(shù)： | 54/115頁 |
| 文件大小： | 2590K |
| 代理商： | MFRC53001T |
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MFRC530_33
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 6 July 2010
057433
54 of 115
NXP Semiconductors
MFRC530
ISO/IEC 14443 A Reader IC
10.5.2.7
CRCResultMSB register
MSB of the CRC coprocessor register.
Table 65.
Table 66.
Bit
7 to 0
10.5.2.8
BitFraming register
Adjustments for bit oriented frames.
Table 67.
Bit
Symbol
Access
Table 68.
Bit
7
6 to 4 RxAlign[2:0]
CRCResultMSB register (address: 0Eh) reset value: xxxx xxxxb, xxh bit
allocation
7
6
5
4
CRCResultMSB[7:0]
Bit
Symbol
Access
3
2
1
0
R
CRCResultMSB register bit descriptions
Symbol
CRCResultMSB[7:0]
Description
gives the CRC register’s most significant byte value; only valid if
CRCReady = logic 1.
The register’s value is undefined for 8-bit CRC calculation.
BitFraming register (address: 0Fh) reset value: 0000 0000b, 00h bit allocation
7
6
5
4
0
RxAlign[2:0]
R/W
D
3
0
2
1
0
TxLastBits[2:0]
D
R/W
BitFraming register bit descriptions
Symbol
Value
0
-
Description
reserved
defines the bit position in the FIFO buffer for the first bit received
and stored. Additional received bits are stored in the next
subsequent bit positions. After reception, RxAlign[2:0] is
automatically cleared. For example:
the LSB of the received bit is stored in bit position 0 and the
second received bit is stored in bit position 1
the LSB of the received bit is stored in bit position 1, the
second received bit is stored in bit position 2
000
001
...
111
the LSB of the received bit is stored in bit position 7, the
second received bit is stored in the next byte in bit position 0
reserved
defines the number of bits of the last byte that shall be
transmitted. 000 indicates that all bits of the last byte will be
transmitted. TxLastBits[2:0] is automatically cleared after
transmission.
3
2 to 0 TxLastBits[2:0]
0
-
-
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MFRC53001T/0FE | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ISO/IEC 14443 A Reader IC |
| MFRC53001T/0FE,112 | 功能描述:RFID應(yīng)答器 MIFARE HS READER RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| MFRC53001T/0FE,518 | 功能描述:RFID應(yīng)答器 IC READER 13.56MHZ RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| MFRC53001T/0FE112 | 制造商:NXP Semiconductors 功能描述:CNTCLESS RC 3.3V ISO14443-A/B |
| MFRC531 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Short Form Specification |
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