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| 型號： | MFRC53001T |
| 廠商： | NXP Semiconductors N.V. |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | ISO-IEC 14443 A Reader IC |
| 封裝： | MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1<week 5, 2005,;MFRC53001T/0FE<SOT287-1 (SO32)|<<http://www.nxp.com/packages/SOT287-1.html<1 |
| 文件頁數(shù)： | 41/115頁 |
| 文件大?。?/td> | 2590K |
| 代理商： | MFRC53001T |
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MFRC530_33
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2010. All rights reserved.
Product data sheet
PUBLIC
Rev. 3.3 — 6 July 2010
057433
41 of 115
NXP Semiconductors
MFRC530
ISO/IEC 14443 A Reader IC
10.3 Register overview
Table 37.
Sub
address
(Hex)
Page 0: Command and status
00h
Page
01h
Command
02h
FIFOData
03h
PrimaryStatus
04h
FIFOLength
05h
SecondaryStatus
06h
InterruptEn
07h
InterruptRq
Page 1: Control and status
08h
Page
09h
Control
0Ah
ErrorFlag
0Bh
CollPos
0Ch
TimerValue
MFRC530 register overview
Register name
Function
Refer to
selects the page register
starts and stops command execution
input and output of 64-byte FIFO buffer
receiver and transmitter and FIFO buffer status flags
number of bytes buffered in the FIFO buffer
secondary status flags
enable and disable interrupt request control bits
interrupt request flags
Table 39 on page 46
Table 41 on page 46
Table 43 on page 47
Table 45 on page 47
Table 47 on page 48
Table 49 on page 49
Table 51 on page 49
Table 53 on page 50
selects the page register
control flags for timer unit, power saving etc
show the error status of the last command executed
bit position of the first bit-collision detected on the RF interface
value of the timer
Table 39 on page 46
Table 55 on page 51
Table 57 on page 52
Table 59 on page 53
Table 61 on page 53
0Dh
0Eh
0Fh
Page 2: Transmitter and coder control
10h
Page
11h
TxControl
12h
CwConductance
13h
PreSet13
14h
CoderControl
15h
ModWidth
16h
PreSet16
17h
PreSet17
Page 3: Receiver and decoder control
18
Page
19
RxControl1
1A
DecoderControl
1B
BitPhase
1C
RxThreshold
1D
BPSKDemControl
1Eh
RxControl2
1Fh
ClockQControl
CRCResultLSB
CRCResultMSB
BitFraming
LSB of the CRC coprocessor register
MSB of the CRC coprocessor register
adjustments for bit oriented frames
Table 63 on page 53
Table 65 on page 54
Table 67 on page 54
selects the page register
controls the operation of the antenna driver pins TX1 and TX2
selects the conductance of the antenna driver pins TX1 and TX2
Table 71 on page 56
do not change these values
sets the clock frequency and the encoding
selects the modulation pulse width
do not change these values
do not change these values
Table 39 on page 46
Table 69 on page 55
Table 73 on page 56
Table 75 on page 57
Table 77 on page 57
Table 79 on page 58
Table 81 on page 58
selects the page register
controls receiver behavior
controls decoder behavior
selects the bit-phase between transmitter and receiver clock
selects thresholds for the bit decoder
controls BPSK receiver behavior
controls decoder and defines the receiver input source
clock control for the 90
°
phase-shifted Q-channel clock
Table 39 on page 46
Table 83 on page 59
Table 85 on page 60
Table 87 on page 60
Table 89 on page 61
Table 91 on page 61
Table 93 on page 62
Table 95 on page 62
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|---|---|
| MFRC53101T | ISO-IEC 14443 reader IC |
| MFRX85201HD | Secure contactless reader solution |
| MMBD4148 | High-speed switching diode |
| MMBD6050-V-GS08 | SWITING 70V 0.2A 3PIN SOT-23 - Tape and Reel |
| MMBD6050-V-GS18 | SWITING 70V 0.2A 3PIN SOT-23 - Tape and Reel |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| MFRC53001T/0FE | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:ISO/IEC 14443 A Reader IC |
| MFRC53001T/0FE,112 | 功能描述:RFID應(yīng)答器 MIFARE HS READER RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| MFRC53001T/0FE,518 | 功能描述:RFID應(yīng)答器 IC READER 13.56MHZ RoHS:否 制造商:Murata 存儲容量:512 bit 工作溫度范圍:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel |
| MFRC53001T/0FE112 | 制造商:NXP Semiconductors 功能描述:CNTCLESS RC 3.3V ISO14443-A/B |
| MFRC531 | 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:Short Form Specification |
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