參數(shù)資料
型號(hào): MT48LC32M4A2P-7ELIT:G
元件分類: DRAM
英文描述: 32M X 4 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-54
文件頁數(shù): 4/74頁
文件大?。?/td> 2385K
PDF: 09005aef8091e66d/Source: 09005aef8091e625
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128MSDRAM_2.fm - Rev. N 1/09 EN
12
1999 Micron Technology, Inc. All rights reserved.
128Mb: x4, x8, x16 SDRAM
Functional Block Diagrams
Figure 6:
8 Meg x 16 SDRAM
12
RAS#
CAS#
ROW-
ADDRESS
MUX
CLK
CS#
WE#
CKE
CONTROL
LOGIC
COLUMN-
ADDRESS
COUNTER/
LATCH
MODE REGISTER
9
COMMAND
DECODE
A0–A11,
BA0, BA1
DQML,
DQMH
12
ADDRESS
REGISTER
14
512
(x16)
4,096
I/O GATING
DQM MASK LOGIC
READ DATA LATCH
WRITE DRIVERS
COLUMN
DECODER
BANK0
MEMORY
ARRAY
(4,096 x 512 x 16)
BANK0
ROW-
ADDRESS
LATCH
&
DECODER
4,096
SENSE AMPLIFIERS
BANK
CONTROL
LOGIC
DQ0–
DQ15
16
DATA
INPUT
REGISTER
DATA
OUTPUT
REGISTER
16
12
BANK1
BANK2
BANK3
12
9
2
REFRESH
COUNTER
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