參數(shù)資料
型號(hào): MT48LC32M4A2P-7ELIT:G
元件分類: DRAM
英文描述: 32M X 4 SYNCHRONOUS DRAM, 5.4 ns, PDSO54
封裝: 0.400 INCH, LEAD FREE, PLASTIC, TSOP2-54
文件頁數(shù): 55/74頁
文件大?。?/td> 2385K
PDF: 09005aef8091e66d/Source: 09005aef8091e625
Micron Technology, Inc., reserves the right to change products or specifications without notice.
128MSDRAM_2.fm - Rev. N 1/09 EN
59
1999 Micron Technology, Inc. All rights reserved.
128Mb: x4, x8, x16 SDRAM
Timing Diagrams
Figure 43:
READ – With Auto Precharge
Notes:
1. For this example, BL = 4, and CL = 2.
2. x16: A9 and A11 = “Don’t Care.”
x8: A11 = “Don’t Care.”
ENABLE AUTO PRECHARGE
tCH
tCL
tCK
tAC
tLZ
tRP
tRAS
tRCD
CAS Latency
tRC
DQM /
DQML, DQMH
CKE
CLK
A0–A9, A11
DQ
BA0, BA1
A10
tOH
DOUT m
tCMH
tCMS
tAH
tAS
tAH
tAS
tAH
tAS
ROW
BANK
ROW
BANK
DON’T CARE
UNDEFINED
tHZ
tOH
DOUT m + 3
tAC
tOH
tAC
tOH
tAC
DOUT m + 2
DOUT m + 1
COMMAND
tCMH
tCMS
NOP
ACTIVE
NOP
READ
NOP
ACTIVE
NOP
tCKH
tCKS
COLUMN m 2
T0
T1
T2
T4
T3
T5
T6
T7
T8
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