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16
Revision 1.1
G
2.0
This section defines the signals and describes the external
interface of the SC1100. Figure 2-1 shows the signals
organized by their functional groups. Where signals are
multiplexed, the default signal name is listed first and is
Signal Definitions
separated by a plus sign (+). A slash (/) in a signal name
means that the function is always enabled and available
(i.e., cycle multiplexed).
Figure 2-1. Signal Groups
System
Signals
POR#
X32I
X32O
X27I
X27O
System
Memory
Interface
MD[63:0]
MA[12:0]
BA[1:0]
CS[1:0]#
RASA#
CASA#
WEA#
DQM[7:0]
CKEA
SDCLK[3:0]
SDCLK_IN
SDCLK_OUT
ACCESS.bus
Interface
PCIRST#
IDE_ADDR[2:0]
IDE_DATA[15:0]
IDE_IOR0#
IDE_IOW0#
IDE_CS[1:0]#
IDE_IORDY0
IDE_DREQ0
IDE_DACK0#
IDE_RST#
IRQ14
Geode
SC1100
Dedicated
GPIO
GPIO32+LAD0
GPIO33+LAD1
GPIO34+LAD2
GPIO35+LAD3
GPIO36+LDRQ#
GPIO37+LFRAME#
GPIO39+SERIRQ
Power
Management
GPWIO[2:0]
ONCTL#
PWRBTN#
PWRCNT[2:1]
THRM#
TCK
TDI
TDO
TMS
TRST#
JTAG
POWER_EN
OVER_CUR#
DPOS_PORT1
DNEG_PORT1
DPOS_PORT2
DNEG_PORT2
DPOS_PORT3
DNEG_PORT3
SIN
SOUT
GPIO7+RTS#+IDE_DACK1#
GPIO8+CTS#+IDE_DREQ1
GPIO6+DTR#/BOUT+IDE_IOR1#
GPIO11+RI#+IRQ15
GPIO9+DCD#+IDE_IOW1#
GPIO10+DSR#+IDE_IORDY1
USB
Interface
AB1C
AB1D
AB2C+GPIO12
AB2D+GPIO13
Serial Port
(UART) /
IDE Interface
BIT_CLK
SDATA_OUT+CLKSEL2
SDATA_IN
SYNC+CLKSEL3
AC97_CLK
AC9T_RST#
IRRX1+GPIO16+PC_BEEP
AC97 Audio
Interface
/ Infrared
GPIO1
GPIO18
GPIO38
GPIO47
SDTEST5+GPIO40
GPIO41
PCICLKO
PCICLK
INTA#, INTB#, INTD#
GPIO19+INTC#
FRAME#
PERR#
SERR#
REQ[3:0]#
GNT[3:2]#
GNT1#+CLKSEL1
A[23:0]/AD[23:0]
D[7:0]/AD[32:24]
D[11:8]/C/BE[3:0]#
D12/PAR
D13/TRDY#
D14/IRDY#
D15/STOP#
BHE#/DEVSEL#
GPIO17+IOCHRDY+IOCS0#
ROMCS#+BOOT16
GPIO20+DOCCS#
RD#+CLKSEL0
WR#
GPIO15+DOCW#+IOW#
GPIO0+TRDE#
GPIO2+F5BAR4CS#
GPIO3+F5BAR5CS#
GPIO14+IOCS1#+DOCR#+IOR#
FMUL3B
IRTX+GXCLK
PLL5B
GTEST
SDTEST[4:0]
IDE
Interface
Sub-ISA/PCI
Bus Interface
GPIO/LPC
Bus Interface
Test and
Measurement /
Infrared
GNT0#+LPC_ROM