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Signal Definitions
(Continued)
Table 2-2. Ball Assignment - Sorted by Ball Number
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer
1
Type
Power
Rail
Configuration
A1
V
SS
GND
---
---
---
A2
V
IO
PWR
---
---
---
A3
CS1#
O
O
2/5
V
IO
---
A4
2
MD17
I/O
IN
T
,
TS
2/5
V
IO
---
A5
2
MD19
I/O
IN
T
,
TS
2/5
V
IO
---
A6
2
MD21
I/O
IN
T
,
TS
2/5
V
IO
---
A7
2
MD23
I/O
IN
T
,
TS
2/5
V
IO
---
A8
MA6
O
O
2/5
V
IO
---
A9
MA8
O
O
2/5
V
IO
---
A10
MA10
O
O
2/5
V
IO
---
A11
DQM3
O
O
2/5
V
IO
---
A12
2
MD25
I/O
IN
T
,
TS
2/5
V
IO
---
A13
2
MD27
I/O
IN
T
,
TS
2/5
V
IO
---
A14
2
MD29
I/O
IN
T
,
TS
2/5
V
IO
---
A15
2
MD31
I/O
IN
T
,
TS
2/5
V
IO
---
A16
SDCLK2
O
O
2/5
V
IO
---
A17
SDCLK3
O
O
2/5
V
IO
---
A18
SDTEST2
O
O
2/5
V
IO
---
A19
CKEA
O
O
2/5
V
IO
---
A20
SDTEST0
O
O
2/5
V
IO
---
A21
NC
---
---
V
IO
---
A22
GPIO3
I/O
(PU
22.5
)
IN
TS
,
O
8/8
V
IO
PMR[3] = 0
F5BAR5CS#
O
O
3/5
PMR[3] = 1
A23
NC
---
---
V
IO
---
A24
GPIO39
I/O
(PU
22.5
)
IN
PCI
,
O
PCI
V
IO
PMR[16] = 0
SERIRQ
I/O
(PU
22.5
)
IN
PCI
,
O
PCI
PMR[16] = 1
A25
V
IO
PWR
---
---
---
A26
V
SS
GND
---
---
---
B1
V
IO
PWR
---
---
---
B2
V
SS
GND
---
---
---
B3
CS0#
O
O
2/5
V
IO
---
B4
2
MD16
I/O
IN
T
,
TS
2/5
V
IO
---
B5
2
MD18
I/O
IN
T
,
TS
2/5
V
IO
---
B6
2
MD20
I/O
IN
T
,
TS
2/5
V
IO
---
B7
2
MD22
I/O
IN
T
,
TS
2/5
V
IO
---
B8
2
MD52
I/O
IN
T
,
TS
2/5
V
IO
---
B9
2
MD54
I/O
IN
T
,
TS
2/5
V
IO
---
B10
MA9
O
O
2/5
V
IO
---
B11
DQM2
O
O
2/5
V
IO
---
B12
2
MD24
I/O
IN
T
,
TS
2/5
V
IO
---
B13
2
MD26
I/O
IN
T
,
TS
2/5
V
IO
---
B14
2
MD28
I/O
IN
T
,
TS
2/5
V
IO
---
B15
2
MD30
I/O
IN
T
,
TS
2/5
V
IO
---
B16
2
MD57
I/O
IN
T
,
TS
2/5
V
IO
---
B17
2
MD59
I/O
IN
T
,
TS
2/5
V
IO
---
B18
2
MD61
I/O
IN
T
,
TS
2/5
V
IO
---
B19
2
MD63
I/O
IN
T
,
TS
2/5
V
IO
---
B20
GPIO40
I/O
(PU
22.5
)
IN
TS
,
O
2/5
V
IO
PMR[28] = 0 and
PMR[27] = 0 and
FPCI_MON = 0
SDTEST5
O
(PU
22.5
)
O
2/5
PMR[28] = 1 and
PMR[27] = 0 and
FPCI_MON = 0
F_AD6
O
(PU
22.5
)
O
2/5
PMR[27] = 1 or
FPCI_MON = 1
(overrides PMR[28])
B21
GPIO2
I/O
(PU
22.5
)
IN
TS
,
O
8/8
V
IO
PMR[1] = 0
F5BAR4CS#
O
O
3/5
PMR[1] = 1
B22
TRDE#
O
O
3/5
V
IO
PMR[12] = 0
GPIO0
I/O
(PU
22.5
)
IN
TS
,
O
8/8
PMR[12] = 1
B23
GPIO17
I/O
(PU
22.5
)
IN
TS
,
O
8/8
V
IO
PMR[5] = 0 and
PMR[9] = 0
IOCS0#
O
(PU
22.5
)
O
3/5
PMR[5] = 1 and
PMR[9] = 0
IOCHRDY
I
IN
TS
PMR[5] = 1 and
PMR[9] = 1
B24
GPIO37
I/O
(PU
22.5
)
IN
PCI
,
O
PCI
V
IO
PMR[14] = 0
LFRAME#
O
O
PCI
PMR[14] = 1
B25
V
SS
GND
---
---
---
B26
V
IO
PWR
---
---
---
C1
RASA#
O
O
2/5
V
IO
---
C2
WEA#
O
O
2/5
V
IO
---
C3
V
IO
PWR
---
---
---
C4
SDCLK_OUT
O
O
2/5
V
IO
---
C5
SDCLK1
O
O
2/5
V
IO
---
C6
2
MD49
I/O
IN
T
,
TS
2/5
V
IO
---
C7
2
MD51
I/O
IN
T
,
TS
2/5
V
IO
---
Ball
No.
Signal Name
I/O
(PU/PD)
Buffer
1
Type
Power
Rail
Configuration