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310
Revision 1.1
G
Electrical Specifications
(Continued)
Table 7-19. Register Transfer to/from Device
Symbol
Parameter
Mode 0
(ns)
Mode 1
(ns)
Mode 2
(ns)
Mode 3
(ns)
Mode 4
(ns)
t
0
Cycle time
1
(min)
1.
t
0
is the minimum total cycle time, t
2
is the minimum command active time, and t
2i
is the minimum command recovery
time or command inactive time. The actual cycle time equals the sum of the command active time and the command
inactive time. The three timing requirements of t
0
, t
2
, and t
2i
are met. The minimum total cycle time requirements is
greater than the sum of t
2
and t
2i
. (This means that a host implementation can lengthen t
2
and/or t
2i
to ensure that t
0
is
equal to or greater than the value reported in the device’s IDENTIFY DEVICE data.)
This parameter specifies the time from the rising edge of IDE_IOR[0:1]# to the time that the data bus is no longer driven
by the device (TRI-STATE).
The delay from the activation of IDE_IOR[0:1]# or IDE_IOW[0:1]# until the state of IDE_IORDY[0,1] is first sampled. If
IDE_IORDY[0:1] is inactive, then the host waits until IDE_IORDY[0:1] is active before the PIO cycle is completed. If the
device is not driving IDE_IORDY[0:1] negated after activation (t
A
) of IDE_IOR[0:1]# or IDE_IOW[0:1]#, then t
5
is met
and t
RD
is not applicable. If the device is driving IDE_IORDY[0:1] negated after activation (t
A
) of IDE_IOR[0:1]# or
IDE_IOW[0:1]#, then t
RD
is met and t
5
is not applicable.
600
383
240
180
120
t
1
Address valid to IDE_IOR[0:1]#/ IDE_IOW[0:1]#
setup (min)
70
50
30
30
25
t
2
IDE_IOR[0:1]#/IDE_IOW[0:1]# pulse width 8-bit
1
(min)
290
290
290
80
70
t
2i
IDE_IOR[0:1]#/IDE_IOW[0:1]# recovery time
1
(min)
-
-
-
70
25
t
3
IDE_IOW[0:1]# data setup (min)
60
45
30
30
20
t
4
IDE_IOW[0:1]# data hold (min)
30
20
15
10
10
t
5
IDE_IOR[0:1]# data setup (min)
50
35
20
20
20
t
6
IDE_IOR[0:1]# data hold (min)
5
5
5
5
5
t
6Z
IDE_IOR[0:1]# data TRI-STATE
2
(max)
2.
30
30
30
30
30
t
9
IDE_IOR[0:1]#/IDE_IOW[0:1]# to address valid
hold (min)
20
15
10
10
10
t
RD
Read Data Valid to IDE_IORDY[0:1] active (if
IDE_IORDY[0:1] initially low after t
A
(min)
0
0
0
0
0
t
A
IDE_IORDY[0:1] Setup time
3
3.
35
35
35
35
35
t
B
IDE_IORDY[0:1] Pulse Width (max)
1250
1250
1250
1250
1250
t
C
IDE_IORDY[0:1] Assertion to release (max)
5
5
5
5
5