Revision 1.1
305
www.national.com
G
Electrical Specifications
(Continued)
t
RDYA2
IOCHRDY valid after IOR#/MEMR#/
RD#/DOCR#/IOW#/MEMW#/WR#/
DOCW# FE
8
M, I/O
366
7-17
7-18
t
IOCSA
IOCS[1:0]#/DOCS#/ROMCS#/F5BAR
4CS#/ F5BAR5CS# driven active
from A[23:0] valid
8, 16
M, I/O
34
7-17
7-18
t
IOCSH
IOCS[1:0]#/DOCS#/ROMCS#/F5BAR
4CS#/ F5BAR5CS# valid Hold after
A[23:0] invalid
8, 16
M, I/O
0
7-17
7-18
t
AR1
A[23:0]/BHE# valid before
MEMR#/DOCR# active
16
M
34
7-17
t
AR2
A[23:0]/BHE# valid before IOR#
active
16
I/O
100
7-17
t
AR3
A[23:0]/BHE# valid before
MEMR#/DOCR#/IOR# active
8
M, I/O
100
7-17
t
RA
A[23:0]/BHE# valid Hold after
MEMR#/DOCR#/IOR# inactive
8, 16
M, I/O
25
7-17
t
RVDS
Read data D[15:0] valid setup before
MEMR#/DOCR#/IOR# inactive
8, 16
M, I/O
24
7-17
t
RDH
Read data D[15:0] valid Hold after
MEMR#/DOCR#/IOR# inactive
8, 16
M, I/O
0
7-17
t
HZ
Read data floating after
MEMR#/DOCR#/IOR# inactive
8, 16
M, I/O
41
7-17
t
AW1
A[23:0]/BHE# valid before
MEMW#/DOCW# active
16
M
34
7-18
t
AW2
A[23:0]/BHE# valid before IOW#
active
16
I/O
100
7-18
t
AW3
A[23:0]/BHE# valid before
MEMW#/DOCW#/IOW# active
8
M, I/O
100
7-18
t
WA
A[23:0]/BHE# valid Hold after
MEMW#/DOCW#/IOW# invalid
8, 16
M, I/O
25
7-18
t
DV1
Write data D[15:0] valid after
MEMW#/DOCW# active
8, 16
M
40
7-18
t
DV2
Write data D[15:0] valid after IOW#
active
8
I/O
40
7-18
t
DV3
Write data D[15:0] valid after IOW#
active
16
I/O
-23
7-18
t
WTR
TRDE# inactive after
MEMW#/DOCW#/IOW# inactive
8, 16
M, I/O
20
7-18
t
DH
Write data D[15:0] after
MEMW#/DOCW#/IOW# inactive
8, 16
M, I/O
45
7-18
t
DF
Write data D[15:0] goes TRI-STATE
after MEMW#/DOCW#/IOW# inactive
8, 16
M, I/O
105
7-18
t
WDAR
Write data D[15:0] after read
MEMR#/DOCR#/IOR#
8, 16
M, I/O
41
7-17
Table 7-16. Output Signals (Continued)
Symbol
Parameter
Bus
Width
(Bits)
Type
Min
(ns)
Max
(ns)
Figure
Comments