參數(shù)資料
型號: TFRA08C13
廠商: Lineage Power
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 75/188頁
文件大?。?/td> 3047K
代理商: TFRA08C13
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Lucent Technologies Inc.
75
Preliminary Data Sheet
October 2000
TFRA08C13 OCTAL T1/E1 Framer
Alarms and Performance Monitoring
(continued)
Loopback and Transmission Modes
Primary Loopback Modes
Framer primary loopback mode is controlled by register
FRM_PR24. There are seven primary loopback and
transmission test modes supported:
I
Line loopback (LLB).
I
Board loopback (BLB).
I
Single time-slot system loopback (STSSLB).
I
Single time-slot line loopback (STSLLB).
I
CEPT nailed-up broadcast transmission (CNUBT).
I
Payload loopback (PLLB).
I
CEPT nailed-up connect loopback (CNUCLB).
The loopback and transmission modes are described in
detail below:
I
The LLB mode loops the receive line data and clock
back to the transmit line. The received data is pro-
cessed by the receive framer and transmitted to the
system interface. This mode can be selected by set-
ting register FRM_PR24 to 001xxxxx (binary).
I
The BLB mode loops the receive system data back
to the system after:
— The transmit framer processes the data, and
— The receive framer processes the data.
In the BLB mode, AIS is always transmitted to the line
interface. This mode can be selected by setting register
FRM_PR24 to 010xxxxx (binary).
I
The STSSLB mode loops one and only one received
system time slot back to the transmit system inter-
face. The selected looped back time-slot data is not
processed by either the transmit framer or the
receive framer. The selected time slot does not pass
through the receive elastic store buffer and therefore
will not be affected by system-AIS, RLFA conditions,
or controlled slips events. Once selected, the desired
time-slot position has the programmable idle code in
register FRM_PR22 transmitted to the line interface
one frame before implementing the loopback and for
the duration of the loopback. This mode can be
selected by setting register FRM_PR24 to
011A
4
A
3
A
2
A
1
A
0
, where A
4
A
3
A
2
A
1
A
0
is the binary
address of the selected time slot.
I
The STSLLB mode loops one and only one received
line time slot back to the transmit line. The selected
time-slot data is looped to the line after being pro-
cessed by the receive framer, and it passes through
the receive elastic store. The selected time slot has
the programmable idle code in register FRM_PR22
transmitted to the system interface one frame before
implementing the loopback and for the duration of the
loopback. In CEPT, selecting time slot 0 has the
effect of deactivating the current loopback mode
while no other action will be taken (time slot 0 will not
be looped back to the line and should not be cho-
sen). This mode can be selected by setting register
FRM_PR24 to 100A
4
A
3
A
2
A
1
A
0
, where A
4
A
3
A
2
A
1
A
0
is the binary address of the selected time slot.
I
The CNUBT mode transmits received-line time slot X
to the system in time slot X and time slot 0 (of the
next frame). Any time slot can be broadcast. This
mode can be selected by setting register FRM_PR24
to 101A
4
A
3
A
2
A
1
A
0
where A
4
A
3
A
2
A
1
A
0
is the binary
address of the selected time slot.
I
The PLLB mode loops the received line data and
clock back to the transmit line while inserting (replac-
ing) the facility data link in the looped back data. Two
variations of the payload loopback are available. In
the pass-through framing/CRC bit mode (chosen by
setting register FRM_PR24 to 111xxxxx (binary)),
the framing and CRC bits are looped back to the line
transmit data. In the regenerated framing/CRC bit
mode (chosen by setting register FRM_PR24 to
110xxxxx (binary) and register FRM_PR10 bit
3 to 0), the framing and CRC bits are regenerated by
the transmit framer. The payload loopback is only
available for ESF and CEPT modes.
I
The CNUCLB mode loops received system time slot
X back to the system in time slot 0. The selected time
slot is not routed through the receive elastic store
buffer and, therefore, will not be affected by system-
AIS, RLFA conditions, or controlled slips. Any time
slot can be looped back to the system. Time slot X
transmitted to the line is not affected by this loopback
mode. Looping received system time slot 0 has no
effect on time slot 0 transmitted to the line, i.e., the
transmit framer will always overwrite the FAS and
NOT FAS data in time slot 0 transmitted to the line.
This mode can be selected by setting register
FRM_PR24 to 110A
4
A
3
A
2
A
1
A
0
and register
FRM_PR10 bit 3 to 1, where A
4
A
3
A
2
A
1
A
0
is the
binary address of the selected time slot.
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