參數(shù)資料
型號： TMDXCNCD28069ISO
廠商： Texas Instruments
文件頁數(shù)： 157/174頁
文件大?。?/td> 0K
描述： EVAL PICCOLO CONTROLCARD
標(biāo)準(zhǔn)包裝： 1
系列： TMS320F2806x, Piccolo™, C2000™
主要目的： 接口，RS232，GPIO
嵌入式： 是，MCU，32 位
已用 IC / 零件： TMS320F2806x
已供物品： 板
0,
Value
Digital
=
V
0
input
when
V
Voltage
Analog
Input
4096
Value
Digital
REFLO
REFHI
REFLO
-
=
V
input
V
0
when
REFHI
<
4095,
Value
Digital
=
V
input
when
REFHI
0,
Value
Digital
=
V
0
input
when
3.3
V
Voltage
Analog
Input
4096
Value
Digital
REFLO
-
=
V
3.3
input
V
0
when
<
4095,
Value
Digital
=
V
3.3
input
when
SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012
5.10.1 Analog-to-Digital Converter (ADC)
5.10.1.1 Features
The core of the ADC contains a single 12-bit converter fed by two sample-and-hold circuits. The sample-
and-hold circuits can be sampled simultaneously or sequentially. These, in turn, are fed by a total of up to
16 analog input channels. The converter can be configured to run with an internal bandgap reference to
create true-voltage based conversions or with a pair of external voltage references (VREFHI/VREFLO) to
create ratiometric-based conversions.
Contrary to previous ADC types, this ADC is not sequencer-based. The user can easily create a series of
conversions from a single trigger. However, the basic principle of operation is centered around the
configurations of individual conversions, called SOCs, or Start-Of-Conversions.
Functions of the ADC module include:
12-bit ADC core with built-in dual sample-and-hold (S/H)
Simultaneous sampling or sequential sampling modes
Full range analog input: 0 V to 3.3 V fixed, or VREFHI/VREFLO ratiometric. The digital value of the input
analog voltage is derived by:
–
Internal Reference (VREFLO = VSSA. VREFHI must not exceed VDDA when using either internal or
external reference modes.)
–
External Reference (VREFHI/VREFLO connected to external references. VREFHI must not exceed VDDA
when using either internal or external reference modes.)
Runs at full system clock, no prescaling required
Up to 16-channel, multiplexed inputs
16 SOCs, configurable for trigger, sample window, and channel
16 result registers (individually addressable) to store conversion values
Multiple trigger sources
–
S/W – software immediate start
–
ePWM 1–8
–
GPIO XINT2
–
CPU Timer 0, CPU Timer 1, CPU Timer 2
–
ADCINT1, ADCINT2
9 flexible PIE interrupts, can configure interrupt request after any conversion
Copyright 2010–2012, Texas Instruments Incorporated
Peripheral and Electrical Specifications
83
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