參數(shù)資料
型號： TMDXCNCD28069ISO
廠商： Texas Instruments
文件頁數(shù)： 29/174頁
文件大小： 0K
描述： EVAL PICCOLO CONTROLCARD
標(biāo)準(zhǔn)包裝： 1
系列： TMS320F2806x, Piccolo™, C2000™
主要目的： 接口，RS232，GPIO
嵌入式： 是，MCU，32 位
已用 IC / 零件： TMS320F2806x
已供物品： 板
I2CXSR
I2CDXR
I2CRSR
I2CDRR
Clock
Synchronizer
Prescaler
Noise Filters
Arbitrator
I2C INT
Peripheral Bus
Interrupt to
CPU/PIE
SDA
SCL
Control/Status
Registers
CPU
I2C Module
TX FIFO
RX FIFO
FIFO Interrupt to
CPU/PIE
SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012
A.
The I2C registers are accessed at the SYSCLKOUT rate. The internal timing and signal waveforms of the I2C port are
also at the SYSCLKOUT rate.
B.
The clock enable bit (I2CAENCLK) in the PCLKCRO register turns off the clock to the I2C port for low power
operation. Upon reset, I2CAENCLK is clear, which indicates the peripheral internal clocks are off.
Figure 5-41. I2C Peripheral Module Interfaces
The registers in Table 5-48 configure and control the I2C port operation.
Table 5-48. I2C-A Registers
EALLOW
NAME
ADDRESS
DESCRIPTION
PROTECTED
I2COAR
0x7900
No
I2C own address register
I2CIER
0x7901
No
I2C interrupt enable register
I2CSTR
0x7902
No
I2C status register
I2CCLKL
0x7903
No
I2C clock low-time divider register
I2CCLKH
0x7904
No
I2C clock high-time divider register
I2CCNT
0x7905
No
I2C data count register
I2CDRR
0x7906
No
I2C data receive register
I2CSAR
0x7907
No
I2C slave address register
I2CDXR
0x7908
No
I2C data transmit register
I2CMDR
0x7909
No
I2C mode register
I2CISRC
0x790A
No
I2C interrupt source register
I2CPSC
0x790C
No
I2C prescaler register
I2CFFTX
0x7920
No
I2C FIFO transmit register
I2CFFRX
0x7921
No
I2C FIFO receive register
I2CRSR
–
No
I2C receive shift register (not accessible to the CPU)
I2CXSR
–
No
I2C transmit shift register (not accessible to the CPU)
124
Peripheral and Electrical Specifications
Copyright 2010–2012, Texas Instruments Incorporated
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