參數(shù)資料
型號(hào): TMDXCNCD28069ISO
廠商: Texas Instruments
文件頁數(shù): 92/174頁
文件大?。?/td> 0K
描述: EVAL PICCOLO CONTROLCARD
標(biāo)準(zhǔn)包裝: 1
系列: TMS320F2806x, Piccolo™, C2000™
主要目的: 接口,RS232,GPIO
嵌入式: 是,MCU,32 位
已用 IC / 零件: TMS320F2806x
已供物品:
SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012
Table 2-5. Terminal Functions(1) (continued)
PIN NO.
PIN NAME
I/O/Z
DESCRIPTION
PZ
PN
PZP
PFP
VOLTAGE REGULATOR CONTROL SIGNAL
VREGENZ
90
71
I
Internal VREG Enable/Disable. Pull low to enable VREG, pull high to disable VREG.
GPIO AND PERIPHERAL SIGNALS (1)
GPIO0
87
69
I/O/Z
General-purpose input/output 0
EPWM1A
O
Enhanced PWM1 Output A and HRPWM channel
GPIO1
86
68
I/O/Z
General-purpose input/output 1
EPWM1B
O
Enhanced PWM1 Output B
COMP1OUT
O
Direct output of Comparator 1
GPIO2
84
67
I/O/Z
General-purpose input/output 2
EPWM2A
O
Enhanced PWM2 Output A and HRPWM channel
GPIO3
83
66
I/O/Z
General-purpose input/output 3
EPWM2B
O
Enhanced PWM2 Output B
SPISOMIA
I/O
SPI-A slave out, master in
COMP2OUT
O
Direct output of Comparator 2
GPIO4
9
7
I/O/Z
General-purpose input/output 4
EPWM3A
O
Enhanced PWM3 output A and HRPWM channel
GPIO5
10
8
I/O/Z
General-purpose input/output 5
EPWM3B
O
Enhanced PWM3 output B
SPISIMOA
I/O
SPI-A slave in, master out
ECAP1
I/O
Enhanced Capture input/output 1
GPIO6
58
46
I/O/Z
General-purpose input/output 6
EPWM4A
O
Enhanced PWM4 output A and HRPWM channel
EPWMSYNCI
I
External ePWM sync pulse input
EPWMSYNCO
O
External ePWM sync pulse output
GPIO7
57
45
I/O/Z
General-purpose input/output 7
EPWM4B
O
Enhanced PWM4 output B
SCIRXDA
I
SCI-A receive data
ECAP2
I/O
Enhanced Capture input/output 2
GPIO8
54
43
I/O/Z
General-purpose input/output 8
EPWM5A
O
Enhanced PWM5 output A and HRPWM channel
Reserved
Reserved
ADCSOCAO
O
ADC start-of-conversion A
(1)
The GPIO function (shown in bold italics) is the default at reset. The peripheral signals that are listed under them are alternate functions.
For JTAG pins that have the GPIO functionality multiplexed, the input path to the GPIO block is always valid. The output path from the
GPIO block and the path to the JTAG block from a pin is enabled or disabled based on the condition of the TRST signal. See the
"Systems Control and Interrupts" chapter of the TMS320x2806x Piccolo Technical Reference Manual (literature number SPRUH18).
24
Device Overview
Copyright 2010–2012, Texas Instruments Incorporated
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