M0 SARAM (1K x 16, 0-Wait) 0x00 0000 0x00 0040 M1 SARAM (1K x 16, 0-Wait) 0x00 0400 Data Space Prog Space Rese" />
參數(shù)資料
型號(hào): TMDXCNCD28069ISO
廠商: Texas Instruments
文件頁數(shù): 2/174頁
文件大?。?/td> 0K
描述: EVAL PICCOLO CONTROLCARD
標(biāo)準(zhǔn)包裝: 1
系列: TMS320F2806x, Piccolo™, C2000™
主要目的: 接口,RS232,GPIO
嵌入式: 是,MCU,32 位
已用 IC / 零件: TMS320F2806x
已供物品:
M0 Vector RAM (Enabled if VMAP = 0)
M0 SARAM (1K x 16, 0-Wait)
0x00 0000
0x00 0040
M1 SARAM (1K x 16, 0-Wait)
0x00 0400
Data Space
Prog Space
Reserved
0x00 2000
Reserved
Peripheral Frame 0
0x00 0800
0x00 1580
0x00 0D00
PIE Vector - RAM
(256 x 16)
(Enabled if
VMAP = 1,
ENPIE = 1)
0x00 1400
0x00 0E00
0x00 1500
0x00 1480
CPU-to-CLA Message RAM
CLA-to-CPU Message RAM
CLA Registers
Peripheral Frame 0
Peripheral Frame 3
(4K x 16, Protected)
DMA-Accessible
0x00 5000
Peripheral Frame 2
(4K x 16, Protected)
0x00 7000
0x00 8000
L0 DPSARAM (2K x 16)
(0-Wait, Secure Zone + ECSL, CLA Data RAM2)
0x00 8800
L1 DPSARAM (1K x 16)
(0-Wait, Secure Zone + ECSL, CLA Data RAM 0)
0x00 8C00
L2 DPSARAM (1K x 16)
(0-Wait, Secure Zone + ECSL, CLA Data RAM 1)
0x00 9000
L3 DPSARAM (4K x 16)
(0-Wait, Secure Zone + ECSL, CLA Program RAM)
0x00 A000
L4 SARAM (8K x 16)
(0-Wait, Secure Zone + ECSL)
0x00 C000
L5 DPSARAM (8K x 16)
(0-Wait, DMA RAM 0)
L8 DPSARAM (8K x 16)
(0-Wait, DMA RAM 3)
L7 DPSARAM (8K x 16)
(0-Wait, DMA RAM 2)
L6 DPSARAM (8K x 16)
(0-Wait, DMA RAM 1)
0x00 E000
0x01 0000
0x01 2000
Peripheral Frame 1
(4K x 16, Protected)
0x00 6000
Reserved
0x3D 7800
User OTP (1K x 16, Secure Zone + ECSL)
0x3D 7C80
Calibration Data
0x01 4000
Reserved
0x3D 7BFA
Reserved
FLASH
(128K x 16, 8 Sectors, Secure Zone + ECSL)
128-Bit Password
0x3D 8000
0x3F 7FF8
Boot ROM (32K x 16, 0-Wait)
Vector (32 Vectors, Enabled if VMAP = 1)
0x3F 8000
0x3F FFC0
0x3D 7CC0
Get_mode function
0x3D 7CD0
Reserved
0x3D 7E80
PARTID
Calibration Data
Reserved
0x3D 7EB0
Reserved
SPRS698D – NOVEMBER 2010 – REVISED DECEMBER 2012
Figure 2-1. 28069 Memory Map
10
Device Overview
Copyright 2010–2012, Texas Instruments Incorporated
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