Spartan-3AN FPGA Family: Pinout Descriptions
DS557 (v4.1) April 1, 2011
Product Specification
91
FTG256 Footprint (XC3S200AN, XC3S400AN)
X-Ref Target - Figure 21
Figure 21: XC3S200AN and XC3S400AN FPGA in FTG256 Package Footprint (Top View)
69
I/O: Unrestricted,
general-purpose user I/O
51
DUAL: Configuration pins,
then possible user I/O
21
VREF: User I/O or input
voltage reference for bank
2
SUSPEND: Dedicated
SUSPEND and
dual-purpose AWAKE
Power Management pins
21
INPUT: Unrestricted,
general-purpose input pin
32
CLK: User I/O, input, or
global buffer input
16
VCCO: Output voltage
supply for bank
2
CONFIG: Dedicated
configuration pins
4
JTAG: Dedicated JTAG
port pins
6
VCCINT: Internal core
supply voltage (+1.2V)
0
N.C.: Not connected
28
GND: Ground
4
VCCAUX: Auxiliary supply
voltage
123456789
10
11
12
13
14
15
16
A
GND
PROG_B
I/O
L19P_0
I/O
L18P_0
I/O
L17P_0
I/O
L15P_0
I/O
L13P_0
I/O
L12P_0
GCLK10
I/O
L10N_0
GCLK7
I/O
L08N_0
I/O
L07N_0
I/O
L05N_0
I/O
L04N_0
I/O
L04P_0
TCK
GND
B
TDI
TMS
I/O
L19N_0
I/O
L18N_0
VCCO_0
I/O
L15N_0
GND
I/O
L12N_0
GCLK11
VCCO_0
I/O
L08P_0
GND
I/O
L05P_0
VCCO_0
I/O
L02N_0
I/O
L02P_0
VREF_0
TDO
C
I/O
L01N_3
I/O
L01P_3
GND
I/O
L20P_0
VREF_0
I/O
L17N_0
I/O
L16N_0
I/O
L13N_0
I/O
L11P_0
GCLK8
I/O
L10P_0
GCLK6
I/O
L09P_0
GCLK4
I/O
L07P_0
I/O
L03P_0
I/O
L01N_0
GND
I/O
L24N_1
A25
I/O
L24P_1
A24
D
I/O
L03P_3
VCCO_3
I/O
L02N_3
I/O
L02P_3
I/O
L20N_0
PUDC_B
INPUT
I/O
L16P_0
I/O
L11N_0
GCLK9
I/O
L09N_0
GCLK5
I/O
L06P_0
I/O
L03N_0
INPUT
I/O
L01P_0
I/O
L23N_1
A23
I/O
L22N_1
A21
I/O
L22P_1
A20
E
I/O
L03N_3
I/O
L05N_3
I/O
L05P_3
INPUT
L04P_3
GND
INPUT
I/O
L14N_0
VREF_0
VCCO_0
INPUT
VREF_0
I/O
L06N_0
VREF_0
VCCAUX
GND
I/O
L23P_1
A22
I/O
L20P_1
A18
VCCO_1
I/O
L18P_1
A14
F
I/O
L08P_3
GND
I/O
L07P_3
INPUT
L04N_3
VREF_3
VCCAUX
GND
INPUT
I/O
L14P_0
INPUT
L25N_1
INPUT
L25P_1
VREF_1
I/O
L20N_1
A19
I/O
L19N_1
A17
I/O
L18N_1
A15
I/O
L16N_1
A11
G
I/O
L08N_3
VREF_3
I/O
L11P_3
LHCLK0
I/O
L09P_3
I/O
L07N_3
INPUT
L06N_3
VREF_3
INPUT
L06P_3
VCCINT
GND
VCCINT
GND
INPUT
L21N_1
INPUT
L21P_1
VREF_1
I/O
L19P_1
A16
I/O
L17N_1
A13
GND
I/O
L16P_1
A10
H
I/O
L11N_3
LHCLK1
VCCO_3
I/O
L12P_3
LHCLK2
I/O
L09N_3
I/O
L10N_3
I/O
L10P_3
INPUT
L13P_3
VCCINT
GND
INPUT
L13P_1
INPUT
L13N_1
VCCO_1
I/O
L17P_1
A12
I/O
L14N_1
RHCLK5
I/O
L15P_1
IRDY1
RHCLK6
I/O
L15N_1
RHCLK7
J
I/O
L14N_3
LHCLK5
I/O
L14P_3
LHCLK4
I/O
L12N_3
IRDY2
LHCLK3
I/O
L17P_3
VCCO_3
I/O
L17N_3
INPUT
L13N_3
GND
VCCINT
INPUT
L09P_1
VREF_1
INPUT
L09N_1
I/O
L10P_1
A8
I/O
L10N_1
A9
I/O
L14P_1
RHCLK4
VCCO_1
I/O
L12N_1
TRDY1
RHCLK3
K
I/O
L15N_3
LHCLK7
GND
I/O
L15P_3
TRDY2
LHCLK6
I/O
L18P_3
INPUT
L21P_3
INPUT
L21N_3
GND
VCCINT
GND
VCCINT
INPUT
L04P_1
INPUT
L04N_1
VREF_1
I/O
L06N_1
A3
I/O
L11N_1
RHCLK1
I/O
L11P_1
RHCLK0
I/O
L12P_1
RHCLK2
L
I/O
L16P_3
VREF_3
I/O
L16N_3
I/O
L18N_3
I/O
L19N_3
INPUT
L25P_3
INPUT
L25N_3
VREF_3
INPUT
VREF_2
INPUT
VREF_2
GND
VCCAUX
I/O
L06P_1
A2
I/O
L08P_1
A6
GND
I/O
L08N_1
A7
M
I/O
L20P_3
VCCO_3
I/O
L19P_3
I/O
L24N_3
GND
VCCAUX
INPUT
VREF_2
INPUT
VREF_2
VCCO_2
I/O
L13N_2
INPUT
VREF_2
GND
I/O
L05P_1
I/O
L05N_1
VREF_1
I/O
L07P_1
A4
I/O
L07N_1
A5
N
I/O
L20N_3
I/O
L22P_3
I/O
L24P_3
I/O
L01P_2
M1
INPUT
VREF_2
I/O
L04P_2
VS1
I/O
L07P_2
I/O
L08N_2
D4
I/O
L11P_2
GCLK0
I/O
L13P_2
I/O
L16N_2
I/O
L19P_2
I/O
L01P_1
HDC
I/O
L01N_1
LDC2
VCCO_1
I/O
L03N_1
A1
P
I/O
L22N_3
I/O
L23N_3
GND
I/O
L01N_2
M0
I/O
L04N_2
VS0
I/O
L07N_2
I/O
L08P_2
D5
I/O
L10P_2
GCLK14
I/O
L11N_2
GCLK1
I/O
L14N_2
MOSI
CSI_B
I/O
L16P_2
I/O
L17N_2
D3
I/O
L19N_2
GND
I/O
L02N_1
LDC0
I/O
L03P_1
A0
R
I/O
L23P_3
I/O
L02P_2
M2
I/O
L03P_2
RDWR_B
VCCO_2
I/O
L05N_2
GND
I/O
L09P_2
GCLK12
VCCO_2
I/O
L12P_2
GCLK2
GND
I/O
L15N_2
DOUT
VCCO_2
I/O
L18N_2
D1
I/O
L20N_2
CCLK
I/O
L02P_1
LDC1
SUSPEND
T
GND
I/O
L02N_2
CSO_B
I/O
L03N_2
VS2
I/O
L05P_2
I/O
L06P_2
D7
I/O
L06N_2
D6
I/O
L09N_2
GCLK13
I/O
L10N_2
GCLK15
I/O
L12N_2
GCLK3
I/O
L14P_2
I/O
L15P_2
AWAKE
I/O
L17P_2
INIT_B
I/O
L18P_2
D2
I/O
L20P_2
D0
DIN/MISO
DONE
GND
Bank 2
Bank
3
Bank
1
Bank 0
DS529-4_06_012009