參數(shù)資料
型號: XC3S400AN-5FTG256C
廠商: Xilinx Inc
文件頁數(shù): 83/123頁
文件大小: 0K
描述: IC FPGA SPARTAN-3AN 256FTBGA
標(biāo)準(zhǔn)包裝: 90
系列: Spartan®-3AN
LAB/CLB數(shù): 896
邏輯元件/單元數(shù): 8064
RAM 位總計: 368640
輸入/輸出數(shù): 195
門數(shù): 400000
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: 0°C ~ 85°C
封裝/外殼: 256-LBGA
供應(yīng)商設(shè)備封裝: 256-FTBGA
Spartan-3AN FPGA Family: DC and Switching Characteristics
DS557 (v4.1) April 1, 2011
Product Specification
62
Table 52: Master Mode CCLK Output Frequency by ConfigRate Option Setting
Symbol
Description
ConfigRate
Setting
Temperature
Range
Minimum
Maximum
Units
FCCLK1
Equivalent CCLK clock frequency
by ConfigRate setting
1
(power-on value)
Commercial
0.400
0.797
MHz
Industrial
0.847
MHz
FCCLK3
3
Commercial
1.20
2.42
MHz
Industrial
2.57
MHz
FCCLK6
6
(default)
Commercial
2.40
4.83
MHz
Industrial
5.13
MHz
FCCLK7
7
Commercial
2.80
5.61
MHz
Industrial
5.96
MHz
FCCLK8
8
Commercial
3.20
6.41
MHz
Industrial
6.81
MHz
FCCLK10
10
Commercial
4.00
8.12
MHz
Industrial
8.63
MHz
FCCLK12
12
Commercial
4.80
9.70
MHz
Industrial
10.31
MHz
FCCLK13
13
Commercial
5.20
10.69
MHz
Industrial
11.37
MHz
FCCLK17
17
Commercial
6.80
13.74
MHz
Industrial
14.61
MHz
FCCLK22
22
Commercial
8.80
18.44
MHz
Industrial
19.61
MHz
FCCLK25
25
Commercial
10.00
20.90
MHz
Industrial
22.23
MHz
FCCLK27
27
Commercial
10.80
22.39
MHz
Industrial
23.81
MHz
FCCLK33
33
Commercial
13.20
27.48
MHz
Industrial
29.23
MHz
FCCLK44
44
Commercial
17.60
37.60
MHz
Industrial
40.00
MHz
FCCLK50
50
Commercial
20.00
44.80
MHz
Industrial
47.66
MHz
FCCLK100
100
Commercial
40.00
88.68
MHz
Industrial
94.34
MHz
Table 53: Master Mode CCLK Output Minimum Low and High Time
Symbol
Description
ConfigRate Setting
Units
1
3
6
7
8
10
1213
17222527
33
4450
100
TMCCL,
TMCCH
Master Mode
CCLK
Minimum
Low and High
Time
Commercial 595 196 98.3 84.5 74.1 58.4 48.9 44.1 34.2 25.6 22.3 20.9 17.1 12.3 10.4 5.3
ns
Industrial
560 185 92.6 79.8 69.8 55.0 46.0 41.8 32.3 24.2 21.4 20.0 16.2 11.9 10.0 5.0
ns
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