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參數(shù)資料
| 型號： | XRT86VL3X |
| 廠商： | Exar Corporation |
| 元件分類： | 通信及網(wǎng)絡 |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁數(shù)： | 2/149頁 |
| 文件大?。?/td> | 1274K |
| 代理商： | XRT86VL3X |
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XRT86VL3X
2
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
REV. 1.2.0
APPLICATIONS
High-Density T1/E1/J1 interfaces for Multiplexers,
Switches, LAN Routers and Digital Modems
SONET/SDH terminal or Add/Drop multiplexers
(ADMs)
T1/E1/J1 add/drop multiplexers (MUX)
Channel Service Units (CSUs): T1/E1/J1 and
Fractional T1/E1/J1
Digital Access Cross-connect System (DACs)
Digital Cross-connect Systems (DCS)
Frame Relay Switches and Access Devices
(FRADS)
ISDN Primary Rate Interfaces (PRA)
PBXs and PCM channel bank
T3 channelized access concentrators and M13
MUX
Wireless base stations
ATM equipment with integrated DS1 interfaces
Multichannel DS1 Test Equipment
T1/E1/J1 Performance Monitoring
Voice over packet gateways
Routers
FEATURES
Independent, full duplex DS1 Tx and Rx Framer/
LIUs
Two 512-bit (two-frame) elastic store, PCM frame
slip buffers (FIFO) on TX and Rx provide up to
8.192 MHz asynchronous back plane connections
with jitter and wander attenuation
Supports input PCM and signaling data at 1.544,
2.048, 4.096 and 8.192 Mbits. Also supports 4-
channel multiplexed 12.352/16.384 (HMVIP/H.100)
Mbit/s on the back plane bus
Programmable output clocks for Fractional T1/E1/
J1
Supports Channel Associated Signaling (CAS)
Supports Common Channel Signalling (CCS)
Supports ISDN Primary Rate Interface (ISDN PRI)
signaling
Extracts and inserts robbed bit signaling (RBS)
3 Integrated HDLC controllers per channel for
transmit and receive, each controller having two
96-byte buffers (buffer 0 / buffer 1)
HDLC Controllers Support SS7
Timeslot assignable HDLC
V5.1 or V5.2 Interface
Automatic Performance Report Generation (PMON
Status) can be inserted into the transmit LAPD
interface every 1 second or for a single
transmission
Alarm Indication Signal with Customer Installation
signature (AIS-CI)
Remote Alarm Indication with Customer Installation
(RAI-CI)
Gapped Clock interface mode for Transmit and
Receive.
Intel/Motorola and Power PC interfaces for
configuration, control and status monitoring
Parallel
search
algorithm
synchronization
Wide choice of T1 framing structures: SF/D4, ESF,
SLC
96, T1DM and N-Frame (non-signaling)
Direct access to D and E channels for fast
transmission of data link information
PRBS, QRSS, and Network Loop Code generation
and detection
Programmable Interrupt output pin
Supports programmed I/O and DMA modes of
Read-Write access
Each framer block encodes and decodes the T1/
E1/J1 Frame serial data
Detects and forces Red (SAI), Yellow (RAI) and
Blue (AIS) Alarms
Detects OOF, LOF, LOS errors and COFA
conditions
Loopbacks: Local (LLB) and Line remote (LB)
Facilitates Inverse Multiplexing for ATM
Performance monitor with one second polling
Boundary scan (IEEE 1149.1) JTAG test port
Accepts external 8kHz Sync reference
1.8V Inner Core Voltage
3.3V I/O operation with 5V tolerant inputs
for
fast
frame
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| XRT91L30IQ | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L30 | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
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相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| XRT86VL3X_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION |
| XRT86VL3X_0710 | 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION |
| XRT86VX38 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION |
| XRT86VX38_09 | 制造商:EXAR 制造商全稱:EXAR 功能描述:8-CHANNEL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION |
| XRT86VX38_0906 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION |
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