參數(shù)資料
型號: XRT86VL3X
廠商: Exar Corporation
元件分類: 通信及網(wǎng)絡(luò)
英文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述: Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù): 62/149頁
文件大小: 1274K
代理商: XRT86VL3X
XRT86VL3X
55
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
REV. 1.2.0
Figure 59
shows the waveforms for connecting the Transmit Payload Data Input Interface block to local
Terminal Equipment.
Figure 60
shows the waveforms for connecting the Receive Payload Data Input
Interface block to local Terminal Equipment.
F
IGURE
58. I
NTERFACING
THE
R
ECEIVE
P
ATH
TO
LOCAL
TERMINAL
EQUIPMENT
F
IGURE
59. W
AVEFORMS
FOR
CONNECTING
THE
T
RANSMIT
P
AYLOAD
D
ATA
I
NPUT
I
NTERFACE
B
LOCK
TO
LOCAL
T
ERMINAL
E
QUIPMENT
RxSERCLK0
RxSER0
RxMSYNC0
RxSYNC0
RxCHCLK0
RxCHN[4:0]_0
RxSERCLK7
RxSER7
RxMSYNC7
RxSYNC7
RxCHCLK7
RxCHN[4:0]_7
Receive
Payload
Data Input
Interface
Chn 0
Receive
Payload
Data Input
Interface
Chn 7
Terminal
Equipment
XRT86VL38
C
TxSERCLK
TxSERCLK (INV)
TxSER
TxSYNC(input)
TxCHCLK
TxCHN[4:0]
TxCHN[0]/TxSIG
TxCHCLK
TxCHN[2]/TxTS
TxCHN[1]/TxFrTD
c1 c2 c3 c4 c5
c1 c2 c3 c4 c5
c1 c2 c3 c4 c5
c1 c2 c3 c4 c5
8
7
6
5
4
3
2
1
8
7
6
5
4
3
2
1
Input Data
Input Data
Signaling
Input Data
Timeslot #1
Timeslot #15
Timeslot #16
Timeslot #32
Timeslot 32
Timeslot 1
Timeslot 15
Timeslot 16
A B
D
C
A B
D
C
A B
D
C
A B
D
If Tx Fractional E1 Input Enable = 0
If Tx Fractional E1 Input Enable = 1
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