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參數(shù)資料
| 型號(hào)： | XRT86VL3X |
| 廠商： | Exar Corporation |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 中文描述： | Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0 |
| 文件頁(yè)數(shù)： | 27/149頁(yè) |
| 文件大?。?/td> | 1274K |
| 代理商： | XRT86VL3X |
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XRT86VL3X
20
REV. 1.2.0
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
HDLC CONTROLLERS AND LAPD MESSAGES
The purpose of the HDLC controllers is to allow messages to be stored for transport in the outbound transmit
framer block or extracted from the receive framer block through the LAPD interface. Each channel within the
Framer has 3 independent HDLC controllers. Each HDLC controller has two 96-Byte buffers for Transmit and
two 96-Byte buffers for Receive. The buffers are used to insert messages into the out going data stream for
Transmit or to extract messages from the incoming data stream from the Receive path. Total, there are twelve
96-Byte buffers per channel. This allows multiple HDLC messages to be transported to and from EXAR’s
framing device.
2.2
Programming Sequence for Sending Less Than 96-Byte Messages
Once the data link source and the type of message has been chosen, the following programming sequence
can be followed to send (in this example) a 15-bye LAPD message.
N
OTE
:
To send more than 96-Bytes, the programming sequence is slightly modified, which is described in the next section.
1.
Read the Transmit Data Link Byte Count Register to determine which buffer is available.
2.
Enable TxSOT in the Data Link Interrupt Enable Register.
3.
Write 0x0F into the transmit byte count register (assuming buffer 0 was available).
4.
Write the 15-byte message contents into register 0xn600 (automatically incremented).
5.
Enable the LAPD transmission by writing to register 0xn113.
6.
Once TxEOT occurs, the message has been transmitted.
2.3
Programming Sequence for Sending Large Messages
1.
Read the Transmit Data Link Byte Count Register to determine which buffer is available.
2.
Enable TxSOT in the Data Link Interrupt Enable Register.
3.
Write 0x60 into the transmit byte count register (assuming buffer 0 was available).
4.
Write the first 96-bytes into register 0xn600 (buffer 0, automatically incremented).
5.
Enable the LAPD transmission by writing to register 0xn113.
6.
Wait for the TxSOT before writing the next 96-bytes.
F
IGURE
28. HDLC C
ONTROLLERS
Buffer 0
Buffer 1
Transmit
Receive
96-Bytes
96-Bytes
96-Bytes
96-Bytes
Transmit
Receive
96-Bytes
96-Bytes
96-Bytes
96-Bytes
Transmit
Receive
96-Bytes
96-Bytes
96-Bytes
96-Bytes
HDLC1
HDLC2
HDLC3
Buffer 0
Buffer 1
Buffer 0
Buffer 1
Channel N
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| XRT91L30_0611 | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L306 | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L30IQ | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L30 | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
| XRT91L31 | STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| XRT86VL3X_07 | 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION |
| XRT86VL3X_0710 | 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION |
| XRT86VX38 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION |
| XRT86VX38_09 | 制造商:EXAR 制造商全稱:EXAR 功能描述:8-CHANNEL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION |
| XRT86VX38_0906 | 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION |
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