參數(shù)資料
型號： XRT86VL3X
廠商： Exar Corporation
元件分類： 通信及網(wǎng)絡(luò)
英文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
中文描述： Ultraframer DS3/E3/DS2/E2/DS1/E1/DS0
文件頁數(shù)： 66/149頁
文件大?。?/td> 1274K
代理商： XRT86VL3X
XRT86VL3X
59
T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
REV. 1.2.0
6.2.2
Multiplexed High-Speed Mode
Bit-Multiplexed 16.384Mbit/s
When the Back-plane interface data rate is 16.384Mbit/s, HMVIP 16.384Mbit/s, and H.100 16.384Mbit/s, the
interface signals are all configured as inputs, except the receive serial data on RxSER and the multi frame sync
pulse provided by the framer. The Transmit Serial Clock for each channel is always an input clock with
frequency of 2.048 MHz for all data rates so that it may be used as the timing reference for the transmit line
rate. The TxMSYNC signal is configured as the Transmit Input Clock with frequency of 16.384 MHz. It serves
as the primary clock source for the High-speed Back-plane Interface. Payload and signaling data of Channel
0-3 are multiplexed onto the Transmit Serial Data pin of Channel 0. Payload and signaling data of Channel 4-7
are multiplexed onto the Transmit Serial Data pin of Channel 4. The Transmit Single-frame Synchronization
signal of Channel 0 pulses HIGH at the beginning of the multiplexed frame with data from Channel 0-3
multiplexed together. The Transmit Single-frame Synchronization signal of Channel 4 pulses HIGH at the
beginning of the multiplexed frame with data from Channel 4-7 multiplexed together. It is the responsibility of
the Terminal Equipment to align the multiplexed transmit serial data with the Transmit Single-frame
Synchronization pulse. Additionally, each channel requires the local Terminal Equipment to provide a free-
running 2.048 MHz clock into the Transmit Serial Clock input. The local Terminal Equipment maps four
2.048Mbit/s E1 data streams into one 16.384Mbit/s serial data stream as described below:
1.
Payload data of four channels are repeated and grouped together in a bit-interleaved way. The first pay-
load bit of Timeslot 0 of Channel 0 is sent first, followed by the first payload bit of Timeslot 0 of Channel 1
and 2. The first payload bit of Timeslot 0 of Channel 3 is sent last.
After the first bit of Timeslot 0 of all four channels are sent, it comes the second bit of Timeslot 0 of
Channel 0 and so on. The table below demonstrates how payload bits of four channels are mapped into
the 16.384Mbit/s data stream.
X
Y
: The Xth payload bit of Channel Y
2.
The local Terminal Equipment also multiplexed signaling bits with payload bits and sent them together
through the 16.384Mbit/s data stream.
When the Terminal Equipment is sending the fifth payload bit of one channel, instead of sending it twice,
it inserts the signaling bit A of that corresponding channel. Similarly, the sixth payload bit is followed by
the signaling bit B of that corresponding channel; the seventh payload bit is followed by the signaling bit
C; the eighth payload bit is followed by the signaling bit D.
The following table illustrates how payload bits and signaling bits are multiplexed together into the
16.384Mbit/s data stream.
B
IT
0
B
IT
1
B
IT
2
B
IT
3
B
IT
4
B
IT
5
B
IT
6
B
IT
7
1
0
1
0
1
1
1
1
1
2
1
2
1
3
1
3
B
IT
0
B
IT
1
B
IT
2
B
IT
3
B
IT
4
B
IT
5
B
IT
6
B
IT
7
2
0
2
0
2
1
2
1
2
2
2
2
2
3
2
3
B
IT
0
B
IT
1
B
IT
2
B
IT
3
B
IT
4
B
IT
5
B
IT
6
B
IT
7
5
0
A
0
5
1
A
1
5
2
A
2
5
3
A
3
相關(guān)PDF資料
PDF描述
XRT91L30_0611 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L306 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L30IQ STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L30 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
XRT91L31 STS-12/STM-4 OR STS-3/STM-1 SONET/SDH TRANSCEIVER
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
XRT86VL3X_07 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
XRT86VL3X_0710 制造商:EXAR 制造商全稱:EXAR 功能描述:T1/E1/J1 FRAMER/LIU COMBO - ARCHITECTURE DESCRIPTION
XRT86VX38 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
XRT86VX38_09 制造商:EXAR 制造商全稱:EXAR 功能描述:8-CHANNEL T1/E1/J1 FRAMER/LIU COMBO - T1 REGISTER DESCRIPTION
XRT86VX38_0906 制造商:EXAR 制造商全稱:EXAR 功能描述:OCTAL T1/E1/J1 FRAMER/LIU COMBO - HARDWARE DESCRIPTION
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

采購需求

(若只采購一條型號，填寫一行即可)

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

發(fā)布成功！您可以繼續(xù)發(fā)布采購。也可以進(jìn)入我的后臺，查看報價

*型號 *數(shù)量 廠商 批號 封裝
添加更多采購

我的聯(lián)系方式

*
*
*