TM1100 Preliminary Data Book
Philips Semiconductors
A-100
PRELIMINARY INFORMATION
File: ops.fm5, modified 7/23/99
Interruptible indirect jump on false
SYNTAX
[ IF r
guard ] ijmpf rsrc1 rsrc2
FUNCTION
if r
guard then {
if (r
src1 & 1) = 0 then {
DPC
← rsrc2
if exception is pending then
service exception
elseif interrupt is pending then
service interrupts
else
PC, SPC
← rsrc2
}
ATTRIBUTES
Function unit
branch
Operation code
181
Number of operands
2
Modier
no
Modier range
—
Delay
3
Issue slots
2, 3, 4
DESCRIPTION
The ijmpf operation conditionally changes the program ow and allows pending interrupts or exceptions to be
serviced. If neither interrupts or exceptions are pending and the LSB of r
src1 is 0, the DPC, PC, and SPC registers are
set equal to r
src2. If an interrupt or exception is pending and the LSB of rsrc1 is 0, DPC is set equal to rsrc2 and the
service routine is invoked, where exceptions have priorities over interrupts. If the LSB of r
src1 is 1, program execution
continues with the next sequential instruction.
The ijmpf operation optionally takes a guard, specied in r
guard. If a guard is present, its LSB adds another
condition to the jump. If the LSB of r
guard is 1, the instruction executes as previously described; otherwise, the jump
will not be taken and PC, DPC, and SPC are not modied regardless of the value of r
src1.
EXAMPLES
Initial Values
Operation
Result
r50 = 0, r70 = 0x330
ijmpf r50 r70
program execution continues at 0x330 after
rst servicing pending interrupts
r20 = 1, r70 = 0x330
ijmpf r20 r70
since r20 is true, program execution contin-
ues with next sequential instruction
r30 = 0, r50 = 0, r60 = 0x8000
IF r30 ijmpf r50 r60
since guard is false, program execution con-
tinues with next sequential instruction
r40 = 1, r50 = 0, r60 = 0x8000
IF r40 ijmpf r50 r60
program execution continues at 0x8000 after
rst servicing pending interrupts
SEE ALSO
ijmpf