
File: ain.fm5, modified 7/24/99
PRELIMINARY INFORMATION
8-1
Audio In
Chapter 8
by Gert Slavenburg
8.1
AUDIO IN OVERVIEW
The TM1100 Audio In unit connects to an off-chip stereo
A/D converter subsystem through a flexible bit-serial
connection. Audio In provides all signals needed to inter-
face to high quality, low cost oversampling A/D convert-
ers, including a generator for a precisely programmable
oversampling A/D system clock. The Audio In unit and
external A/D together provide the following capabilities:
One or two channels of audio input.
Eight- or 16-bit samples per channel.
Programmable sampling rate.
Internal or external sampling clock source.
Audio In autonomously writes sampled audio data to
memory using double buffering (DMA).
Eight-bit mono and stereo as well as 16-bit mono and
stereo PC standard memory data formats are sup-
ported.
Little- and big-endian memory formats are sup-
ported.
8.2
NEW IN TM1100
improved internal clock source with less jitter
8.3
EXTERNAL INTERFACE
Four TM1100 pins are associated with the Audio In unit.
The AI_OSCLK output is an accurately programmable
clock output intended to serve as the master system
clock for the external A/D subsystem. The other three
pins (AI_SCK, AI_WS and AI_SD) constitute a flexible
serial input interface. Using the Audio In MMIO registers,
these pins can be configured to operate in a variety of se-
rial interface framing modes, including but not limited to:
Standard stereo I2S (MSB rst, 1-bit delay from
AI_WS, left & right data in a frame).1
LSB rst, with 1–16 bit data per channel.
Complex serial frames of up to 512 bits/frame, with
‘valid sample’ qualier bit.
The Audio In can be used with many serial A/D converter
devices, including the Philips SAA7366 (stereo A/D),
Crystal Semiconductor CS5331, CS5336 (stereo A/D’s),
CS4218 (codec), Analog Devices AD1847 (codec).
1.
A definition of the Philips I2S serial interface protocol,
among others, can be found in the Philips IC01 da-
tabook.
Table 8-1. Audio-In Unit External Signals
Signal
Type
Description
AI_OSCLK
OUT
Over-Sampling Clock. This output can be
programmed to emit any frequency up to
40-MHz with a resolution of 0.07-Hz. It is
intended for use as the 256fs or 384fs
over sampling clock by external A/D sub-
system.
AI_SCK
I/O-5
When Audio-In is programmed as serial-
interface timing slave (power-up
default), AI_SCK is an input. AI_SCK
receives the serial bitclock from the
external A/D subsystem. This clock is
treated as fully asynchronous to
TM1100 main clock.
When Audio In is programmed as the
serial-interface timing master, AI_SCK
is an output. AI_SCK drives the serial
clock for the external A/D subsystem.
The frequency is a programmable inte-
gral divide of the AI_OSCLK frequency.
AI_SCK is limited to 20 MHz. The sample
rate of valid samples embedded within
the serial stream is also limited by the
bandwidth.latency available in the system
AI_SD
IN-5
Serial Data from external A/D subsystem.
Data on this pin is sampled on positive or
negative edges of AI_SCK as determined
by the CLOCK_EDGE bit in the
AI_SERIAL register.
AI_WS
I/O-5
When Audio In is programmed as the
serial-interface timing slave (power-up
default), AI_WS acts as an input.
AI_WS is sampled on the same edge
as selected for AI_SD.
When Audio In is programmed as the
serial-interface timing master, AI_WS
acts as an output. It is asserted on the
opposite edge of the AI_SD sampling
edge.
AI_WS is the word-select or frame-syn-
chronization signal from/to the external A/
D subsystem.