1014
SAM4CP [DATASHEET]
43051E–ATPL–08/14
Slave Read Mode
In slave mode, SPCK is the input clock for the SPI. The max SPCK frequency is given by setup and hold timings
SPI
7
/SPI
8
(or SPI
10
/SPI
11
). Since this gives a frequency well above the pad limit, the limit in slave read mode is given by
SPCK pad.
Slave Write Mode
t
setup
is the setup time from the master before sampling data.
45.4.3.2 SPI Timings
Note:
V
VDDIO
from 3.0V to 3.6V, maximum external capacitor = 10pF.
Note that in SPI master mode, the MCU does not sample the data (MISO) on the opposite edge where data clocks out
(MOSI) but the same edge is used as shown in
Figure 45-1
and
Figure 45-2
.
f
SPCK
Max
2
x S
PI
6
max
orSPI
9
max
t
setup
+
---------------------------------------------------------------------------------------
=
Table 45-8.
Symbol
SPI
0
SPI
1
SPI
2
SPI
3
SPI
4
SPI
5
SPI
6
SPI
7
SPI
8
SPI
9
SPI
10
SPI
11
SPI
12
SPI
13
SPI
14
SPI
15
SPI Timings
Parameter
MISO Setup time before SPCK rises (master)
MISO Hold time after SPCK rises (master)
SPCK rising to MOSI Delay (master)
MISO Setup time before SPCK falls (master)
MISO Hold time after SPCK falls (master)
SPCK falling to MOSI Delay (master)
SPCK falling to MISO Delay (slave)
MOSI Setup time before SPCK rises (slave)
MOSI Hold time after SPCK rises (slave)
SPCK rising to MISO Delay (slave)
MOSI Setup time before SPCK falls (slave)
MOSI Hold time after SPCK falls (slave)
NPCS setup to SPCK rising (slave)
NPCS hold after SPCK falling (slave)
NPCS setup to SPCK falling (slave)
NPCS hold after SPCK falling (slave)
Min
15.3
-3.9
-5.5
21.7
-8.1
-9.9
3.9
0.4
3.9
4.0
1.1
2.8
3.8
-29.9
4.5
-28.7
Max
—
—
1.5
—
—
-4.2
13.8
—
—
14.4
—
—
—
—
—
—
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns