1024你懂的在线看片,久久久久

您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄358702 > E5550F-DOW (ATMEL CORP) SPECIALTY TELECOM CIRCUIT, UUC7 PDF資料下載

型號(hào)：	E5550F-DOW
廠商：	ATMEL CORP
元件分類：	通信及網(wǎng)絡(luò)
英文描述：	SPECIALTY TELECOM CIRCUIT, UUC7
封裝：	DIE-7
文件頁數(shù)：	409/1069頁
文件大?。?/td>	14303K
代理商：	E5550F-DOW

SAM4CP [DATASHEET]

43051E–ATPL–08/14

26.7.2.1 Fixed Priority Arbitration

Fixed priority arbitration algorithm is the first and only arbitration algorithm applied between masters from distinct priority

pools. It is also used in priority pools other than the highest and lowest priority pools (intermediate priority pools).

Fixed priority arbitration allows the Bus Matrix arbiters to dispatch the requests from different masters to the same slave

by using the fixed priority defined by the user in the MxPR field for each master in the Priority registers, MATRIX_PRAS

and MATRIX_PRBS. If two or more master requests are active at the same time, the master with the highest priority

MxPR number is serviced first.

In intermediate priority pools, if two or more master requests with the same priority are active at the same time, the

master with the highest number is serviced first.

26.7.2.2 Round-robin Arbitration

This algorithm is only used in the highest and lowest priority pools. It allows the Bus Matrix arbiters to properly dispatch

requests from different masters to the same slave. If two or more master requests are active at the same time in the

priority pool, they are serviced in a round-robin increasing master number order.

To prevent any single software error from corrupting the Bus Matrix behavior, certain registers in the address space can

be write-protected by setting the WPEN bit in the

“Write Protection Mode Register”

(MATRIX_WPMR).

If a write access to a write-protected register is detected, the WPVS flag in the

“Write Protection Status Register”

(MATRIX_WPSR) is set and the field WPVSRC indicates the register in which the write access has been attempted.

The WPVS bit is automatically cleared after reading the MATRIX_WPSR.

The following registers can be write-protected:

“Bus Matrix Master Configuration Registers”

“Bus Matrix Slave Configuration Registers”

“Bus Matrix Priority Registers A For Slaves”

“System I/O Configuration Register”

相關(guān)PDF資料	PDF描述
E5530H-230-S8	SPECIALTY TELECOM CIRCUIT, PDSO8
E5530H-230-DOW	SPECIALTY TELECOM CIRCUIT, UUC
ECM2A5C3A12-29.939MTR	QUARTZ CRYSTAL RESONATOR, 29.939 MHz
ECM2A5C3A32-34.400M	QUARTZ CRYSTAL RESONATOR, 34.4 MHz
ED1702N	NPN general purpose transistor

相關(guān)代理商/技術(shù)參數(shù)	參數(shù)描述
E5550F-S8	制造商:未知廠家制造商全稱:未知廠家功能描述:Transponder
E5551A-DIT	制造商:未知廠家制造商全稱:未知廠家功能描述:Transponder
E5551A-DOW	制造商:未知廠家制造商全稱:未知廠家功能描述:Transponder
E5551A-FP008	制造商:未知廠家制造商全稱:未知廠家功能描述:TRANSPONDER\|CMOS\|SOP\|8PIN\|PLASTIC
E5552	制造商:未知廠家制造商全稱:未知廠家功能描述:Transponder

發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。

(若只采購一條型號(hào)，填寫一行即可)

*型號(hào)	*數(shù)量	廠商	批號(hào)	封裝