459
SAM4CP [DATASHEET]
43051E–ATPL–08/14
27.7.3.3.4 BER HARD Maximum Error Registers
Name:
Address:
Access:
Reset:
0x00
TXRXBUF_BERHARD_MAX_RX0
0xFD67
Read-only
Used only in PRIME + Robust modes. After a message is received in BUF_RX0, this register stores the logarithm of the
maximum error of the four replicated symbols, regarding the number of received bits, using Viterbi hard* decision. The
value is cleared by hardware each time a new message is received in BUF_RX0.
Name:
Address:
Access:
Reset:
0x00
TXRXBUF_BERHARD_MAX_RX1
0xFD68
Read-only
Used only in PRIME + Robust modes. After a message is received in BUF_RX1, this register stores the logarithm of the
maximum error of the four replicated symbols, regarding the number of received bits, using Viterbi hard* decision. The
value is cleared by hardware each time a new message is received in BUF_RX1.
Name:
Address:
Access:
Reset:
0x00
TXRXBUF_BERHARD_MAX_RX2
0xFD69
Read-only
Used only in PRIME + Robust modes. After a message is received in BUF_RX2, this register stores the logarithm of the
maximum error of the four replicated symbols, regarding the number of received bits, using Viterbi hard* decision. The
value is cleared by hardware each time a new message is received in BUF_RX2.
Name:
Address:
Access:
Reset:
0x00
TXRXBUF_BERHARD_MAX_RX3
0xFD6A
Read-only
Used only in PRIME + Robust modes. After a message is received in BUF_RX3, this register stores the logarithm of the
maximum error of the four replicated symbols, regarding the number of received bits, using Viterbi hard* decision. The
value is cleared by hardware each time a new message is received in BUF_RX3.
7
6
5
4
3
2
1
0
TXRXBUF_BERHARD_MAX_RX0
7
6
5
4
3
2
1
0
TXRXBUF_BERHARD_MAX_RX1
7
6
5
4
3
2
1
0
TXRXBUF_BERHARD_MAX_RX2
7
6
5
4
3
2
1
0
TXRXBUF_BERHARD_MAX_RX3