SAM4CP [DATASHEET]
43051E–ATPL–08/14
8
TCK/SWCLK
Test Clock/Serial Wire Clock
Input
VDDIO
TDI
Test Data In
Input
TDO/TRACESWO
Test Data Out / Trace Asynchronous Data
Out
Output
TMS/SWDIO
Test Mode Select Input /
Serial Wire Input/Output
Input /
I/O
Flash Memory
ERASE
Flash and NVM Configuration Bits Erase
Command
Input
High
VDDIO
Reset / Test
NRST
Synchronous Microcontroller Reset
I/O
Low
VDDIO
Permanent Internal
pull-up.
(3)
TST
Test Select
Input
VDDBU
Permanent Internal
pull-down.
(3)
ARST
PLC Asynchronous Reset
Input
Low
VDDIO
Permanent Internal
pull-up.
(4)
SRST
PLC Synchronous Reset
Input
Low
VDDIO
Permanent Internal
pull-up.
(4)
PLL INIT
PLC PLL Initialization Signal
Input
Low
VDDIO
Permanent Internal
pull-up.
(4)
PPLC (PRIME Power Line Communications) Transceiver
EMIT0 - EMIT11
PLC Transmission ports
(5)
Output
VDDIO
Different configurations
allowed depending on
external topology and
net behaviour
AGC0 - AGC5
PLC Automatic Gain Control
Output
VDDIO
TXRX0 - TXRX1
PLC Ext. coupling TxRx control
Output
VDDIO
VIMA
Negative Differential Voltage Input
Input
VDDOUT AN
VIPA
Positive Differential Voltage Input
Input
VDDOUT AN
VRP
Internal Reference “Plus” Voltage
Output
VDDOUT AN
VRM
Internal Reference “Minus” Voltage
Output
VDDOUT AN
VRC
Common-mode Voltage
Output
VDDOUT AN
VZ CROSS
Mains Zero-Cross Detection Signal
(6)
Input
VDDIO
Permanent Internal pull-
down.
(4)
INTEST0
PLC Internal Test
Input
VDDIO
Permanent Internal
pull-up.
(4)
This pin must be
connected to INTEST5
(pin 144).
INTEST1
PLC Internal Test
Input
VDDIO
Permanent Internal
pull-up.
(4)
This pin must be
connected to INTEST6
(pin 45).
Table 3-1.
Signal Description List (Continued)
Signal Name
Function
Type
Active
Level
Voltage
reference
Comments