591
SAM4CP [DATASHEET]
43051E–ATPL–08/14
Figure 32-7.
Input Change Interrupt Timings When No Additional Interrupt Modes
32.5.11 Programmable I/O Drive
It is possible to configure the I/O drive for pads PA1 to PA4, PA9 to PA28, PA30, PB0, PB2 to PB12, PB14 to PB29,
PB31, PC1 to PC4 and PC6 to PC9. Refer to the section “Electrical Characteristics”.
32.5.12 Programmable Schmitt Trigger
It is possible to configure each input for the Schmitt trigger. By default the Schmitt trigger is active. Disabling the Schmitt
trigger is requested when using the QTouch
Library.
32.5.13 I/O Lines Programming Example
The programming example shown in
Table 32-2
is used to obtain the following configuration.
4-bit output port on I/O lines 0 to 3, (should be written in a single write operation), open-drain, with pull-up resistor.
Four output signals on I/O lines 4 to 7 (to drive LEDs for example), driven high and low, no pull-up resistor, no
pull-down resistor.
Four input signals on I/O lines 8 to 11 (to read push-button states for example), with pull-up resistors, glitch filters
and input change interrupts.
Four input signals on I/O line 12 to 15 to read an external device status (polled, thus no input change interrupt), no
pull-up resistor, no glitch filter.
I/O lines 16 to 19 assigned to peripheral A functions with pull-up resistor.
I/O lines 20 to 23 assigned to peripheral B functions with pull-down resistor.
I/O line 24 to 27 assigned to peripheral C with Input Change Interrupt, no pull-up resistor and no pull-down resistor.
I/O line 28 to 31 assigned to peripheral D, no pull-up resistor and no pull-down resistor.
Peripheral clock
Pin Level
Read PIO_ISR
APB Access
PIO_ISR
APB Access
Table 32-2.
Programming Example
Register
Value to be Written
PIO_PER
0x0000_FFFF
PIO_PDR
0xFFFF_0000
PIO_OER
0x0000_00FF
PIO_ODR
0xFFFF_FF00
PIO_IFER
0x0000_0F00
PIO_IFDR
0xFFFF_F0FF
PIO_SODR
0x0000_0000
PIO_CODR
0x0FFF_FFFF
PIO_IER
0x0F00_0F00
PIO_IDR
0xF0FF_F0FF