164
SAM4CP [DATASHEET]
43051E–ATPL–08/14
12.6.11.10 VLDM
Floating-point Load Multiple
Syntax
VLDM{
mode
}{
cond
}{.
size
}
Rn
{
!
},
list
where:
mode
is the addressing mode:
- IA
Increment After. The consecutive addresses start at the address specified in
Rn
.
- DB
Decrement Before. The consecutive addresses end just before the address specified in
Rn
.
cond
is an optional condition code, see
“Conditional Execution”
.
size
is an optional data size specifier.
Rn
is the base register. The SP can be used.
!
is the command to the instruction to write a modified value back to
Rn
. This is required if mode == DB,
and is optional if mode == IA.
list
is the list of extension registers to be loaded, as a list of consecutively numbered doubleword or single
word registers, separated by commas and surrounded by brackets.
Operation
This instruction loads:
Multiple extension registers from consecutive memory locations using an address from an ARM core
register as the base address.
Restrictions
The restrictions are:
If
size
is present, it must be equal to the size in bits, 32 or 64, of the registers in
list
.
For the base address, the SP can be used.
In the ARM instruction set, if
!
is not specified the PC can be used.
list must contain at least one register. If it contains doubleword registers, it must not contain more than 16
registers.
If using the
Decrement Before addressing
mode, the write back flag,
!
, must be appended to the base
register specification.
Condition Flags
These instructions do not change the flags.
12.6.11.11 VLDR
Loads a single extension register from memory
Syntax
VLDR{
cond
}{.
64
}
Dd
, [
Rn
{#
imm
}]
VLDR{
cond
}{.
64
}
Dd
,
label
VLDR{
cond
}{.
64
}
Dd
, [PC, #
imm
}]
VLDR{
cond
}{.
32
}
Sd
, [
Rn
{, #
imm
}]
VLDR{
cond
}{.
32
}
Sd
,
label
VLDR{
cond
}{.
32
}
Sd
, [PC, #
imm
]
where:
cond
is an optional condition code, see
“Conditional Execution”
.
64, 32
are the optional data size specifiers.
Dd
is the destination register for a doubleword load.
Sd
is the destination register for a singleword load.
Rn
is the base register. The SP can be used.