參數(shù)資料
型號(hào)： EVAL-ADAU1442EBZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 19/93頁(yè)
文件大?。?/td> 0K
描述： BOARD EVAL FOR ADAU1442
標(biāo)準(zhǔn)包裝： 1
系列： SigmaDSP®
主要目的： 音頻，音頻處理
嵌入式： 是，DSP
已用 IC / 零件： ADAU1442
主要屬性： 單芯片多通道 28/56 位音頻 DSP
次要屬性： I²C & SPI 接口
已供物品： 電路板，線纜，說(shuō)明文檔，GPIO 子板，電源
Data Sheet
ADAU1442/ADAU1445/ADAU1446
Rev. D | Page 25 of 92
VOLTAGE REGULATOR
The digital supply voltage of the ADAU1442/ADAU1445/
ADAU1446 must be set to 1.8 V. The chip includes an on-board
voltage regulator that allows the device to be used in systems
where a 1.8 V supply is not available but a 3.3 V supply is. The
only external components needed for this are a PNP transistor
and one resistor. Only one pin, VDRIVE, is necessary to
support the regulator.
The recommended design for the voltage regulator is shown
in Figure 12. The 10 F and 100 nF capacitors shown in this
schematic are recommended for bypassing but are not necessary
for operation. Each DVDD pin should have its own 100 nF
bypass capacitor, but only one bulk capacitor (10 F) is needed
for all pins. In this design, 3.3 V is the main system voltage; 1.8 V
is generated at the collector of the transistor, which is connected
to the DVDD pins. VDRIVE is connected to the base of the PNP
transistor. If the regulator is not used in the design, VDRIVE
can be tied to ground.
3.3V
1k
Ω
VDRIVE
DVDD
10F
100nF
+
07696-
012
ADAU1442/
ADAU1445/
ADAU1446
Figure 12. Voltage Regulator Design
Two specifications must be considered when choosing a regulator
transistor: the current amplification factor (hFE or beta) should
be at least 200, and the collector must be able to dissipate the heat
generated when regulating from 3.3 V to 1.8 V. The maximum
digital current draw of the ADAU1442 and ADAU1445, which
use ASRCs, is 310 mA. The equation to determine the minimum
power dissipation specifications of the transistor is as follows:
(3.3 V 1.8 V) × 310 mA = 465 mW
Many transistors fit these specifications. Analog Devices
recommends the NJT4030P from On Semiconductor. For
projects with stringent size constraints, an FMMT734 from
Zetex can be used.
The ADAU1446, which does not contain ASRCs, has a lower
maximum digital current draw of approximately 235 mA. The
maximum power dissipation of the transistor in this case should
be around 355 mW.
SRC GROUP DELAY
The group delay of the sample rate converter is dependent on
the input and output sampling frequencies as described in the
following equations.
For fS_OUT > fS_IN,
IN
S
IN
S
f
GDS
_
32
16 +
=
For fS_OUT < fS_IN,
×
+
=
OUT
S
IN
S
IN
S
IN
S
f
GDS
_
32
16
where GDS is the group delay in seconds.
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EVAL-ADAU1446EBZ 功能描述:BOARD EVAL FOR ADAU1446 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評(píng)估演示板和套件 系列:SigmaDSP® 標(biāo)準(zhǔn)包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板
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