- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄16427 > EVAL-ADAU1442EBZ (Analog Devices Inc)BOARD EVAL FOR ADAU1442 PDF資料下載
參數(shù)資料
| 型號： | EVAL-ADAU1442EBZ |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 42/93頁 |
| 文件大小： | 0K |
| 描述： | BOARD EVAL FOR ADAU1442 |
| 標準包裝： | 1 |
| 系列： | SigmaDSP® |
| 主要目的： | 音頻，音頻處理 |
| 嵌入式： | 是，DSP |
| 已用 IC / 零件： | ADAU1442 |
| 主要屬性： | 單芯片多通道 28/56 位音頻 DSP |
| 次要屬性： | I²C & SPI 接口 |
| 已供物品： | 電路板，線纜，說明文檔，GPIO 子板，電源 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁當(dāng)前第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁
ADAU1442/ADAU1445/ADAU1446
Data Sheet
Rev. D | Page 46 of 92
FLEXIBLE AUDIO ROUTING MATRIX (FARM)
The routing matrix distributes audio signals among the serial
inputs, serial outputs, ASRCs, S/PDIF receiver and transmitter,
and DSP core. This simplifies the design of complex systems
that require many inputs and outputs with different sample
rates. It also allows signals to be routed in hardware, instead of
in software.
Routing Matrix Block Diagram
Figure 36 shows an overview of audio routing in the ADAU1442/
ADAU1445/ADAU1446 and details the interaction among the
S/PDIF I/O, serial I/O, ASRCs, and DSP via the routing matrix.
To reduce the complexity of the system, audio signals are routed
in pairs. Therefore, in Figure 36, each solid line represents a
stereo pair of audio signals. The corresponding channel
numbers are written above the lines. The dotted lines at the
bottom of the diagram represent clock signals. The two large gray
boxes represent the flexible audio routing matrix, in which one-to-
one connections can be made between any input and any output.
The signal routing is fully implemented in hardware.
System Delay
Routing data through the serial ports, routing matrix, ASRCs,
and DSP core results in a brief delay between the time when an
audio sample is input to the IC and when it is output. If the DSP
is programmed to simply pass serial inputs to serial outputs with
no sample rate conversion or additional processing, the minimum
observed delay of an audio sample from the SDATA_INx pin to
the SDATA_OUTx pin is equal to four sample periods. At a sample
rate of 48 kHz, this corresponds to 83 μs. The system delay increases
as sample rate conversion or additional processing is implemented
in the system.
SERIAL
INPUT
PORTS
(×9)
INPUT
CHANNELS
(24 CH)
F
L
E
X
IBL
E
AUDI
O
RO
UT
ING
M
AT
RI
X
INP
UT
S
IDE
F
L
E
X
IBL
E
AUDI
O
RO
UT
ING
M
AT
RI
X
O
UT
P
UT
S
IDE
OUTPUT
CHANNELS
(24 CH)
SERIAL
OUTPUT
PORTS
(×9)
STEREO
ASRCS
(8 × 2 CH)
S/PDIF Tx
ASRC I/O
(16 CH)
SERIAL I/O
(24 CH)
RATE
SERIAL
INPUT
MODES
CLOCK DOMAINS (×12)
0 TO 2
3 TO 8
9 TO 11
S/PDIF Rx
S/PDIF I/O
(2 CH)
DSP CORE
MASTER/SLAVE
SELECT
AUT
O
M
AT
IC
I
NP
UT
CHANNE
L
AS
S
IG
NM
E
NT
AUT
O
M
AT
IC
O
UT
P
UT
CHANNE
L
AS
S
IG
NM
E
NT
0, 1
2, 3
4, 5
6, 7
8, 9
10, 11
12, 13
14, 15
0, 1
2, 3
4, 5
6, 7
8, 9
10, 11
12, 13
14, 15
SDATA_IN0
SDATA_IN1
SDATA_IN2
SDATA_IN3
SDATA_IN4
SDATA_IN5
SDATA_IN6
SDATA_IN7
SDATA_IN8
SDATA_OUT0
SDATA_OUT1
SDATA_OUT2
SDATA_OUT3
SDATA_OUT4
SDATA_OUT5
SDATA_OUT6
SDATA_OUT7
SDATA_OUT8
0, 1
2, 3
4, 5
6, 7
8, 9
10, 11
12, 13
14, 15
0, 1
2, 3
4, 5
6, 7
8, 9
10, 11
12, 13
14, 15
8
BCL
K0
/L
RCL
K0
BCL
K1
/L
RCL
K1
BCL
K2
/L
RCL
K2
BCL
K3
/L
RCL
K3
BCL
K4
/L
RCL
K4
BCL
K5
/L
RCL
K5
BCL
K6
/L
RCL
K6
BCL
K7
/L
RCL
K7
BCL
K8
/L
RCL
K8
BCL
K9
/L
RCL
K9
BCL
K1
0
/L
RCL
K1
0
BCL
K1
1
/L
RCL
K1
1
P
S
L
2
12
6
2
SPDIFI
SPDIFO
S/PDIF OUTPUT
ON MP PINS
IN
F
RO
M
AS
RCS
O
UT
T
O
AS
RCS
0, 1
2, 3
4, 5
6, 7
8, 9
10, 11
12, 13
14, 15
16, 17
18, 19
20, 21
22, 23
0, 1
2, 3
4, 5
6, 7
8, 9
10, 11
12, 13
14, 15
16, 17
18, 19
20, 21
22, 23
0, 1
2, 3
4, 5
6, 7
8, 9
10, 11
12, 13
14, 15
16, 17
18, 19
20, 21
22, 23
0, 1
2, 3
4, 5
6, 7
8, 9
10, 11
12, 13
14, 15
16, 17
18, 19
20, 21
22, 23
SERIAL
OUTPUT
MODES
07696-
037
Figure 36. Routing Matrix Block Diagram
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| A3AAH-4036G | IDC CABLE - ASC40H/AE40G/ASC40H |
| AMIS30622C6227RG | IC MOTOR DVR MICROSTP I2C 20SOIC |
| A1CXB-3036M | IDC CABLE- AKC30B/AE30M/X |
| VE-214-EX | CONVERTER MOD DC/DC 48V 75W |
| GCC10DRYH-S734 | CONN EDGECARD 20POS DIP .100 SLD |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| EVAL-ADAU1446EBZ | 功能描述:BOARD EVAL FOR ADAU1446 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估演示板和套件 系列:SigmaDSP® 標準包裝:1 系列:PCI Express® (PCIe) 主要目的:接口，收發(fā)器，PCI Express 嵌入式:- 已用 IC / 零件:DS80PCI800 主要屬性:- 次要屬性:- 已供物品:板 |
| EVAL-ADAU1590EBZ | 制造商:Analog Devices 功能描述:EVAL BOARD - Bulk |
| EVAL-ADAU1592EBZ | 制造商:Analog Devices 功能描述:Evaluation Board For ADAU1592 制造商:Analog Devices 功能描述:EVAL BOARD - Boxed Product (Development Kits) |
| EVAL-ADAU1701EB | 制造商:Analog Devices 功能描述:EVAL BOARD FOR SIGMADSP AUDIO PROCESSOR - Bulk |
| EVAL-ADAU1701EBZ | 制造商:Analog Devices 功能描述:EVAL BOARD - Bulk |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。